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* From: Matthew Wilcox <matthew@wil.cx>
@ 2006-10-06 19:01 Matthew Wilcox
  2006-10-06 19:01 ` Matthew Wilcox
  0 siblings, 1 reply; 3+ messages in thread
From: Matthew Wilcox @ 2006-10-06 19:01 UTC (permalink / raw)
  To: Val Henson, Greg Kroah-Hartman
  Cc: netdev, linux-pci, linux-kernel, Matthew Wilcox

Since some devices may not implement the MWI bit, we should check that
the write did set it and return an error if it didn't.

Signed-off-by: Matthew Wilcox <matthew@wil.cx>

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a544997..3d041f4 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -900,13 +900,17 @@ #endif
 		return rc;
 
 	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-	if (! (cmd & PCI_COMMAND_INVALIDATE)) {
-		pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", pci_name(dev));
-		cmd |= PCI_COMMAND_INVALIDATE;
-		pci_write_config_word(dev, PCI_COMMAND, cmd);
-	}
-	
-	return 0;
+	if (cmd & PCI_COMMAND_INVALIDATE)
+		return 0;
+
+	pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", pci_name(dev));
+	cmd |= PCI_COMMAND_INVALIDATE;
+	pci_write_config_word(dev, PCI_COMMAND, cmd);
+
+	/* read result from hardware (in case bit refused to enable) */
+	pci_read_config_word(dev, PCI_COMMAND, &cmd);
+
+	return (cmd & PCI_COMMAND_INVALIDATE) ? 0 : -EINVAL;
 }
 
 /**

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* From: Matthew Wilcox <matthew@wil.cx>
  2006-10-06 19:01 From: Matthew Wilcox <matthew@wil.cx> Matthew Wilcox
@ 2006-10-06 19:01 ` Matthew Wilcox
  2006-10-06 19:26   ` Matthew Wilcox
  0 siblings, 1 reply; 3+ messages in thread
From: Matthew Wilcox @ 2006-10-06 19:01 UTC (permalink / raw)
  To: Val Henson, Greg Kroah-Hartman
  Cc: netdev, linux-pci, linux-kernel, Matthew Wilcox

We used to check whether pci_set_mwi() had succeeded by testing the
hardware MWI bit.  Now we need only check the return value (and failing
to do so is a warning).  Also, pci_set_mwi() will fail if the cache line
size is 0, so we don't need to check that ourselves any more.

Signed-off-by: Matthew Wilcox <matthew@wil.cx>

diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index d11d28c..64d999b 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -1135,7 +1135,6 @@ static void __devinit tulip_mwi_config (
 {
 	struct tulip_private *tp = netdev_priv(dev);
 	u8 cache;
-	u16 pci_command;
 	u32 csr0;
 
 	if (tulip_debug > 3)
@@ -1153,21 +1152,15 @@ static void __devinit tulip_mwi_config (
 	/* set or disable MWI in the standard PCI command bit.
 	 * Check for the case where  mwi is desired but not available
 	 */
-	if (csr0 & MWI)	pci_set_mwi(pdev);
-	else		pci_clear_mwi(pdev);
-
-	/* read result from hardware (in case bit refused to enable) */
-	pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
-	if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
-		csr0 &= ~MWI;
-
-	/* if cache line size hardwired to zero, no MWI */
-	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
-	if ((csr0 & MWI) && (cache == 0)) {
-		csr0 &= ~MWI;
+	if (csr0 & MWI)	{
+		if (pci_set_mwi(pdev))
+			csr0 &= ~MWI;
+	} else {
 		pci_clear_mwi(pdev);
 	}
 
+	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
+
 	/* assign per-cacheline-size cache alignment and
 	 * burst length values
 	 */

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: From: Matthew Wilcox <matthew@wil.cx>
  2006-10-06 19:01 ` Matthew Wilcox
@ 2006-10-06 19:26   ` Matthew Wilcox
  0 siblings, 0 replies; 3+ messages in thread
From: Matthew Wilcox @ 2006-10-06 19:26 UTC (permalink / raw)
  To: Val Henson, Greg Kroah-Hartman; +Cc: netdev, linux-pci, linux-kernel

On Fri, Oct 06, 2006 at 01:01:34PM -0600, Matthew Wilcox wrote:

Sorry about these.  Stupid git-send-email requires a line of garbage
before the headers.

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2006-10-06 19:01 From: Matthew Wilcox <matthew@wil.cx> Matthew Wilcox
2006-10-06 19:01 ` Matthew Wilcox
2006-10-06 19:26   ` Matthew Wilcox

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