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From: "Michael Chan" <mchan@broadcom.com>
To: "David Miller" <davem@davemloft.net>
Cc: "netdev" <netdev@vger.kernel.org>
Subject: [PATCH v2 2/16][BNX2]:  Fix register and memory test on 5709.
Date: Thu, 03 May 2007 00:28:29 -0700	[thread overview]
Message-ID: <1178177309.4909.66.camel@dell> (raw)
In-Reply-To: <1178068303.4820.35.camel@dell>

[BNX2]: Fix register and memory test on 5709.

Tweak registers and memory test range for 5709.

Signed-off-by: Michael Chan <mchan@broadcom.com>

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 9f0a067..6d05397 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3763,10 +3763,11 @@ static int
 bnx2_test_registers(struct bnx2 *bp)
 {
 	int ret;
-	int i;
+	int i, is_5709;
 	static const struct {
 		u16   offset;
 		u16   flags;
+#define BNX2_FL_NOT_5709	1
 		u32   rw_mask;
 		u32   ro_mask;
 	} reg_tbl[] = {
@@ -3774,26 +3775,26 @@ bnx2_test_registers(struct bnx2 *bp)
 		{ 0x0090, 0, 0xffffffff, 0x00000000 },
 		{ 0x0094, 0, 0x00000000, 0x00000000 },
 
-		{ 0x0404, 0, 0x00003f00, 0x00000000 },
-		{ 0x0418, 0, 0x00000000, 0xffffffff },
-		{ 0x041c, 0, 0x00000000, 0xffffffff },
-		{ 0x0420, 0, 0x00000000, 0x80ffffff },
-		{ 0x0424, 0, 0x00000000, 0x00000000 },
-		{ 0x0428, 0, 0x00000000, 0x00000001 },
-		{ 0x0450, 0, 0x00000000, 0x0000ffff },
-		{ 0x0454, 0, 0x00000000, 0xffffffff },
-		{ 0x0458, 0, 0x00000000, 0xffffffff },
-
-		{ 0x0808, 0, 0x00000000, 0xffffffff },
-		{ 0x0854, 0, 0x00000000, 0xffffffff },
-		{ 0x0868, 0, 0x00000000, 0x77777777 },
-		{ 0x086c, 0, 0x00000000, 0x77777777 },
-		{ 0x0870, 0, 0x00000000, 0x77777777 },
-		{ 0x0874, 0, 0x00000000, 0x77777777 },
-
-		{ 0x0c00, 0, 0x00000000, 0x00000001 },
-		{ 0x0c04, 0, 0x00000000, 0x03ff0001 },
-		{ 0x0c08, 0, 0x0f0ff073, 0x00000000 },
+		{ 0x0404, BNX2_FL_NOT_5709, 0x00003f00, 0x00000000 },
+		{ 0x0418, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
+		{ 0x041c, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
+		{ 0x0420, BNX2_FL_NOT_5709, 0x00000000, 0x80ffffff },
+		{ 0x0424, BNX2_FL_NOT_5709, 0x00000000, 0x00000000 },
+		{ 0x0428, BNX2_FL_NOT_5709, 0x00000000, 0x00000001 },
+		{ 0x0450, BNX2_FL_NOT_5709, 0x00000000, 0x0000ffff },
+		{ 0x0454, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
+		{ 0x0458, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
+
+		{ 0x0808, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
+		{ 0x0854, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
+		{ 0x0868, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
+		{ 0x086c, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
+		{ 0x0870, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
+		{ 0x0874, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
+
+		{ 0x0c00, BNX2_FL_NOT_5709, 0x00000000, 0x00000001 },
+		{ 0x0c04, BNX2_FL_NOT_5709, 0x00000000, 0x03ff0001 },
+		{ 0x0c08, BNX2_FL_NOT_5709,  0x0f0ff073, 0x00000000 },
 
 		{ 0x1000, 0, 0x00000000, 0x00000001 },
 		{ 0x1004, 0, 0x00000000, 0x000f0001 },
@@ -3840,7 +3841,6 @@ bnx2_test_registers(struct bnx2 *bp)
 
 		{ 0x5004, 0, 0x00000000, 0x0000007f },
 		{ 0x5008, 0, 0x0f0007ff, 0x00000000 },
-		{ 0x500c, 0, 0xf800f800, 0x07ff07ff },
 
 		{ 0x5c00, 0, 0x00000000, 0x00000001 },
 		{ 0x5c04, 0, 0x00000000, 0x0003000f },
@@ -3880,8 +3880,16 @@ bnx2_test_registers(struct bnx2 *bp)
 	};
 
 	ret = 0;
+	is_5709 = 0;
+	if (CHIP_NUM(bp) == CHIP_NUM_5709)
+		is_5709 = 1;
+
 	for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
 		u32 offset, rw_mask, ro_mask, save_val, val;
+		u16 flags = reg_tbl[i].flags;
+
+		if (is_5709 && (flags & BNX2_FL_NOT_5709))
+			continue;
 
 		offset = (u32) reg_tbl[i].offset;
 		rw_mask = reg_tbl[i].rw_mask;
@@ -3950,10 +3958,10 @@ bnx2_test_memory(struct bnx2 *bp)
 {
 	int ret = 0;
 	int i;
-	static const struct {
+	static struct mem_entry {
 		u32   offset;
 		u32   len;
-	} mem_tbl[] = {
+	} mem_tbl_5706[] = {
 		{ 0x60000,  0x4000 },
 		{ 0xa0000,  0x3000 },
 		{ 0xe0000,  0x4000 },
@@ -3961,7 +3969,21 @@ bnx2_test_memory(struct bnx2 *bp)
 		{ 0x1a0000, 0x4000 },
 		{ 0x160000, 0x4000 },
 		{ 0xffffffff, 0    },
+	},
+	mem_tbl_5709[] = {
+		{ 0x60000,  0x4000 },
+		{ 0xa0000,  0x3000 },
+		{ 0xe0000,  0x4000 },
+		{ 0x120000, 0x4000 },
+		{ 0x1a0000, 0x4000 },
+		{ 0xffffffff, 0    },
 	};
+	struct mem_entry *mem_tbl;
+
+	if (CHIP_NUM(bp) == CHIP_NUM_5709)
+		mem_tbl = mem_tbl_5709;
+	else
+		mem_tbl = mem_tbl_5706;
 
 	for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
 		if ((ret = bnx2_do_mem_test(bp, mem_tbl[i].offset,



  parent reply	other threads:[~2007-05-03  6:41 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-05-02  1:11 [PATCH 0/20][BNX2]: Bug fixes and more 5709 suppot Michael Chan
2007-05-02  7:10 ` Jeff Garzik
2007-05-02  7:14   ` David Miller
2007-05-03  7:25 ` [ETHTOOL]: Add 2.5G bit definitions Michael Chan
2007-05-03 11:11   ` Jeff Garzik
2007-05-03 20:07     ` David Miller
2007-05-03 20:17   ` David Miller
2007-05-03  7:27 ` [PATCH] ethtool: Add 2.5G support Michael Chan
2007-05-03 11:11   ` Jeff Garzik
2007-05-11 20:46   ` Jeff Garzik
2007-05-03  7:27 ` [PATCH v2 0/16][BNX2]: Bug fixes and more 5709 suppot Michael Chan
2007-05-03  7:28 ` [PATCH v2 1/16][BNX2]: Block MII access when ifdown Michael Chan
2007-05-03 20:18   ` David Miller
2007-05-03  7:28 ` Michael Chan [this message]
2007-05-03 20:18   ` [PATCH v2 2/16][BNX2]: Fix register and memory test on 5709 David Miller
2007-05-03  7:28 ` [PATCH v2 3/16][BNX2]: Add 40-bit DMA workaround for 5708 Michael Chan
2007-05-03 20:19   ` David Miller
2007-05-03  7:29 ` [PATCH v2 4/16][BNX2]: Fix race conditions when calling register_netdev() Michael Chan
2007-05-03 20:20   ` David Miller
2007-05-03  7:29 ` [PATCH v2 5/16][BNX2]: Save PCI state during suspend Michael Chan
2007-05-03 20:20   ` David Miller
2007-05-03  7:29 ` [PATCH v2 6/16][BNX2]: Update 5708 firmware Michael Chan
2007-05-03 20:21   ` David Miller
2007-05-03  7:29 ` [PATCH v2 8/16][BNX2]: Add ipv6 TSO and checksum for 5709 Michael Chan
2007-05-03 20:22   ` David Miller
2007-05-03  7:30 ` [PATCH v2 9/16][BNX2]: Put MII register offsets in the bnx2 struct Michael Chan
2007-05-03 20:23   ` David Miller
2007-05-03  7:30 ` [PATCH v2 10/16][BNX2]: Re-structure the 2.5G Serdes code Michael Chan
2007-05-03 20:23   ` David Miller
2007-05-03  7:30 ` [PATCH v2 11/16][BNX2]: Add support for 5709 Serdes Michael Chan
2007-05-03 20:23   ` David Miller
2007-05-03  7:30 ` [PATCH v2 12/16][BNX2]: Add indirect spinlock Michael Chan
2007-05-03 20:24   ` David Miller
2007-05-03  7:31 ` [PATCH v2 13/16][BNX2]: Restructure PHY event handling Michael Chan
2007-05-03 20:24   ` David Miller
2007-05-03  7:31 ` [PATCH v2 14/16][BNX2]: Add 1-shot MSI handler for 5709 Michael Chan
2007-05-03 20:24   ` David Miller
2007-05-03  7:31 ` [PATCH v2 15/16][BNX2]: Print bus information for PCIE devices Michael Chan
2007-05-03 20:25   ` David Miller
2007-05-03  7:32 ` [PATCH v2 16/16][BNX2]: Update version and reldate Michael Chan
2007-05-03 12:40   ` Jeff Garzik
2007-05-03 20:25   ` David Miller
     [not found] ` <1178177565.4909.80.camel@dell>
2007-05-03 20:21   ` [PATCH v2 7/16][BNX2]: Update 5709 firmware David Miller

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