RE: [PATCH] ibm_newemac: Add support for GPCS, SGMII and M88E1112PHY

RE: [PATCH] ibm_newemac: Add support for GPCS, SGMII and M88E1112PHY

[Victor Gallardo]

[-- Attachment #1.1: Type: text/plain, Size: 1395 bytes --]

Hello Benjamin,
 
On the 460EX/GT in SGMII mode, GPCS access is needed for communication with the internal SGMII SerDes. It is possible that there is still a PHY. So we need a way to access both addresses.
 
For Example on the AMCC Arches Board.
 
EMAC 0 has only a GPCS PHY (address 0xA)
EMAC 1 has M88E1112 PHY (address 0x0) and GPCS PHY (address 0xB)
EMAC 2 has M88E1112 PHY (address 0x1) and GPCS PHY (address 0xC)
 
Regards,
 
Victor Gallardo

________________________________

From: Benjamin Herrenschmidt [mailto:benh@kernel.crashing.org]
Sent: Sun 9/7/2008 5:29 PM
To: Victor Gallardo
Cc: linuxppc-dev@ozlabs.org; Feng Kan
Subject: Re: [PATCH] ibm_newemac: Add support for GPCS, SGMII and M88E1112PHY



On Fri, 2008-09-05 at 16:52 -0700, Victor Gallardo wrote:
> From: Victor Gallardo <vgallardo@amcc.com>
>
> This patch adds GPCS, SGMII and M88E1112 PHY support
> for the AMCC PPC460GT/EX processors.

So if I understand the patch correctly, either there is an *MII PHY in
which case phy_address is used, or there's a GPCS one and phy_address is
-1 and gpcs_address is used right ?

Why not instead always use phy_address, and have a flag indicating
whether it's an MII or GPCS PHY ? This would avoid the added
gpcs_read/write functions, among other things, and I believe would look
cleaner... Or am I missing something ?

Cheers,
Ben.





[-- Attachment #1.2: Type: text/html, Size: 2347 bytes --]

[-- Attachment #2: Type: text/plain, Size: 146 bytes --]

_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev

RE: [PATCH] ibm_newemac: Add support for GPCS, SGMII and M88E1112PHY

[Benjamin Herrenschmidt]

On Sun, 2008-09-07 at 22:57 -0700, Victor Gallardo wrote:
> Hello Benjamin,
>  
> On the 460EX/GT in SGMII mode, GPCS access is needed for communication with the internal SGMII SerDes. It is possible that there is still a PHY. So we need a way to access both addresses.
>  
> For Example on the AMCC Arches Board.
>  
> EMAC 0 has only a GPCS PHY (address 0xA)
> EMAC 1 has M88E1112 PHY (address 0x0) and GPCS PHY (address 0xB)
> EMAC 2 has M88E1112 PHY (address 0x1) and GPCS PHY (address 0xC)

Ok. Thanks. I need to review your patch a bit better, hopefully later
this week. I'll let you know. Ping me if you get no news by next monday.

Cheers,
Ben.

> Regards,
>  
> Victor Gallardo
> 
> ________________________________
> 
> From: Benjamin Herrenschmidt [mailto:benh@kernel.crashing.org]
> Sent: Sun 9/7/2008 5:29 PM
> To: Victor Gallardo
> Cc: linuxppc-dev@ozlabs.org; Feng Kan
> Subject: Re: [PATCH] ibm_newemac: Add support for GPCS, SGMII and M88E1112PHY
> 
> 
> 
> On Fri, 2008-09-05 at 16:52 -0700, Victor Gallardo wrote:
> > From: Victor Gallardo <vgallardo@amcc.com>
> >
> > This patch adds GPCS, SGMII and M88E1112 PHY support
> > for the AMCC PPC460GT/EX processors.
> 
> So if I understand the patch correctly, either there is an *MII PHY in
> which case phy_address is used, or there's a GPCS one and phy_address is
> -1 and gpcs_address is used right ?
> 
> Why not instead always use phy_address, and have a flag indicating
> whether it's an MII or GPCS PHY ? This would avoid the added
> gpcs_read/write functions, among other things, and I believe would look
> cleaner... Or am I missing something ?
> 
> Cheers,
> Ben.
> 
> 
> 
> 

RE: [PATCH] ibm_newemac: Add support for GPCS, SGMII andM88E1112PHY

[Victor Gallardo]

Hi Ben,

>Ok. Thanks. I need to review your patch a bit better, hopefully later
>this week. I'll let you know. Ping me if you get no news by next monday.
>
>Cheers,
>Ben.

Have you had a change to look at this patch.

Thanks,

Victor Gallardo