* bnx2x: Use request_firmware()
@ 2009-04-04 22:15 John Wright
2009-04-04 22:15 ` [PATCH 2/4] " John Wright
0 siblings, 1 reply; 3+ messages in thread
From: John Wright @ 2009-04-04 22:15 UTC (permalink / raw)
To: netdev; +Cc: Eilon Greenstein
Hello,
Following is the "meat" of a patch series to make the bnx2x driver use
request_firmware(). I have omitted patches 1/4 and 4/4, which
respectively add the firmware in .ihex format to the firmware/ directory
and remove drivers/net/bnx2x_init_values.h, since each patch is just
over a megabyte, and less useful for review than 2/4 and 3/4. The
complete patch series is available here [1].
A description of the firmware file format is in the first patch header:
bnx2x: Add the firmware in ihex format
This was derived from drivers/net/bnx2x_init_values.h.
Each firmware file corresponds to a revision of the card (E1 or E1H).
It is stored in little endian format and starts with a header:
struct bnx2x_fw_file {
struct bnx2x_fw_file_section init_ops;
struct bnx2x_fw_file_section init_ops_offsets;
struct bnx2x_fw_file_section init_data;
struct bnx2x_fw_file_section tsem_int_table_data;
struct bnx2x_fw_file_section tsem_pram_data;
struct bnx2x_fw_file_section usem_int_table_data;
struct bnx2x_fw_file_section usem_pram_data;
struct bnx2x_fw_file_section csem_int_table_data;
struct bnx2x_fw_file_section csem_pram_data;
struct bnx2x_fw_file_section xsem_int_table_data;
struct bnx2x_fw_file_section xsem_pram_data;
};
Each member (except init_ops_offsets, more on that later) represents one
of the arrays currently in bnx2x_init_values.h, and has the following
structure:
struct bnx2x_fw_file_section {
u32 len;
u32 offset;
};
Naturally, len gives the length in bytes of the data in that section,
and offset indicates where data starts, relative to the beginning of the
file.
Now, the init_ops_offsets member exists because, currently, a bunch of
operation or function offsets are given as #define's in
bnx2x_init_values.h. But since if the firmware changes, these offsets
change too, they ought to go in the firmware file. So we keep the
offsets as an array of u32's in the firmware file, and we'll change the
constants in the driver to be indices into this array instead of the
actual offsets.
Signed-off-by: John Wright <john.wright@hp.com>
One slightly tricky part is endianness. I wrote the data to the
firmware file in little endian format. The bnx2x author chose to store
the blobs as integer arrays instead of character arrays, so there's code
all over to byteswap on big endian architectures. Rather than find all
those, I just made temporary buffers and byteswapped in
bnx2x_init_block() before passing the data to functions that would send
the data to the card.
The only exception here is for data given to bnx2x_init_wr_wb(), which
might not actually use the pointer given to it from bnx2x_init_block()
(note the line near the top of that function where it assigns to data).
So, I modified bnx2x_init_wr_wb() to assume it was given data in little
endian format, and byteswapped results as necessary in that function
before passing the data on to the functions that write the data to the
card.
Ideally, the code could be simplified by having the functions that send
firmware data to the card use char arrays instead of u32 arrays, to
avoid a lot of byteswapping on big endian architectures. But this way
touches less code, and since this only happens at initialization time, I
don't think a "few" extra swab32's on big endian architectures will
hurt.
drivers/net/Kconfig | 1 +
drivers/net/bnx2x.h | 19 +
drivers/net/bnx2x_init.h | 401 +-
drivers/net/bnx2x_init_values.h |16322 -----------------------------------
drivers/net/bnx2x_main.c | 75 +
firmware/Makefile | 1 +
firmware/WHENCE | 20 +
firmware/bnx2x-e1-1.48.105.fw.ihex |10789 +++++++++++++++++++++++
firmware/bnx2x-e1h-1.48.105.fw.ihex |12174 ++++++++++++++++++++++++++
9 files changed, 23436 insertions(+), 16366 deletions(-)
commit 7942f34652bd614bc75ddea32feeca22094880e3 (omitted from email)
Author: John Wright <john.wright@hp.com>
bnx2x: Add the firmware in ihex format
commit 1f69e9fcc9822cc69ab8672ea1d782338f4ad21a (PATCH 2/4)
Author: John Wright <john.wright@hp.com>
bnx2x: Use request_firmware()
commit c8b95dffac22ceda88d267e3844a1023448deb1e (PATCH 3/4)
Author: John Wright <john.wright@hp.com>
bnx2x: Get init_ops offsets from the firmware file
commit 2a0fb45fb5cc6846bd4953639f5103a78ee44d58 (omitted from email)
Author: John Wright <john.wright@hp.com>
bnx2x: Remove unused bnx2x_init_values.h file
[1]: http://free.linux.hp.com/~jswright/bnx2x_request_firmware/
--
+----------------------------------------------------------+
| John Wright <john.wright@hp.com> |
| HP Mission Critical OS Enablement & Solution Test (MOST) |
+----------------------------------------------------------+
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 2/4] bnx2x: Use request_firmware()
2009-04-04 22:15 bnx2x: Use request_firmware() John Wright
@ 2009-04-04 22:15 ` John Wright
2009-04-04 22:15 ` [PATCH 3/4] bnx2x: Get init_ops offsets from the firmware file John Wright
0 siblings, 1 reply; 3+ messages in thread
From: John Wright @ 2009-04-04 22:15 UTC (permalink / raw)
To: netdev; +Cc: Eilon Greenstein, John Wright
This patch makes the driver use a firmware image for all of the data
that was previously in bnx2x_init_values.h, except for some constants
that were indexes into the init_ops array. That dependency will be
removed in the next patch.
Signed-off-by: John Wright <john.wright@hp.com>
---
drivers/net/Kconfig | 1 +
drivers/net/bnx2x.h | 19 ++++++++
drivers/net/bnx2x_init.h | 116 ++++++++++++++++++++++++++++++----------------
drivers/net/bnx2x_main.c | 75 +++++++++++++++++++++++++++++
4 files changed, 171 insertions(+), 40 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index e5ffc1c..ff3ad89 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2620,6 +2620,7 @@ config TEHUTI
config BNX2X
tristate "Broadcom NetXtremeII 10Gb support"
depends on PCI
+ select FW_LOADER
select ZLIB_INFLATE
select LIBCRC32C
help
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index a329bee..dea9b80 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -965,8 +965,27 @@ struct bnx2x {
int gunzip_outlen;
#define FW_BUF_SIZE 0x8000
+ const struct firmware *firmware;
};
+struct bnx2x_fw_file_section {
+ u32 len;
+ u32 offset;
+};
+
+struct bnx2x_fw_file {
+ struct bnx2x_fw_file_section init_ops;
+ struct bnx2x_fw_file_section init_ops_offsets;
+ struct bnx2x_fw_file_section init_data;
+ struct bnx2x_fw_file_section tsem_int_table_data;
+ struct bnx2x_fw_file_section tsem_pram_data;
+ struct bnx2x_fw_file_section usem_int_table_data;
+ struct bnx2x_fw_file_section usem_pram_data;
+ struct bnx2x_fw_file_section csem_int_table_data;
+ struct bnx2x_fw_file_section csem_pram_data;
+ struct bnx2x_fw_file_section xsem_int_table_data;
+ struct bnx2x_fw_file_section xsem_pram_data;
+};
#define BNX2X_MAX_QUEUES(bp) (IS_E1HMF(bp) ? (MAX_CONTEXT / E1HVN_MAX) : \
MAX_CONTEXT)
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h
index 39ba293..50fff14 100644
--- a/drivers/net/bnx2x_init.h
+++ b/drivers/net/bnx2x_init.h
@@ -221,35 +221,40 @@ static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data,
#define IF_IS_PRAM_ADDR(base, addr) \
if (((base) <= (addr)) && ((base) + 0x40000 >= (addr)))
-static const u32 *bnx2x_sel_blob(u32 addr, const u32 *data, int is_e1)
+static const u32 *bnx2x_sel_blob(struct bnx2x *bp, u32 addr, const u32 *data)
{
+ const struct bnx2x_fw_file *fw_file;
+ const struct bnx2x_fw_file_section *section = NULL;
+
+ fw_file = (struct bnx2x_fw_file *)(bp->firmware->data);
+
IF_IS_INT_TABLE_ADDR(TSEM_REG_INT_TABLE, addr)
- data = is_e1 ? tsem_int_table_data_e1 :
- tsem_int_table_data_e1h;
+ section = &fw_file->tsem_int_table_data;
else
IF_IS_INT_TABLE_ADDR(CSEM_REG_INT_TABLE, addr)
- data = is_e1 ? csem_int_table_data_e1 :
- csem_int_table_data_e1h;
+ section = &fw_file->csem_int_table_data;
else
IF_IS_INT_TABLE_ADDR(USEM_REG_INT_TABLE, addr)
- data = is_e1 ? usem_int_table_data_e1 :
- usem_int_table_data_e1h;
+ section = &fw_file->usem_int_table_data;
else
IF_IS_INT_TABLE_ADDR(XSEM_REG_INT_TABLE, addr)
- data = is_e1 ? xsem_int_table_data_e1 :
- xsem_int_table_data_e1h;
+ section = &fw_file->xsem_int_table_data;
else
IF_IS_PRAM_ADDR(TSEM_REG_PRAM, addr)
- data = is_e1 ? tsem_pram_data_e1 : tsem_pram_data_e1h;
+ section = &fw_file->tsem_pram_data;
else
IF_IS_PRAM_ADDR(CSEM_REG_PRAM, addr)
- data = is_e1 ? csem_pram_data_e1 : csem_pram_data_e1h;
+ section = &fw_file->csem_pram_data;
else
IF_IS_PRAM_ADDR(USEM_REG_PRAM, addr)
- data = is_e1 ? usem_pram_data_e1 : usem_pram_data_e1h;
+ section = &fw_file->usem_pram_data;
else
IF_IS_PRAM_ADDR(XSEM_REG_PRAM, addr)
- data = is_e1 ? xsem_pram_data_e1 : xsem_pram_data_e1h;
+ section = &fw_file->xsem_pram_data;
+
+ if (section)
+ data = (u32 *)(bp->firmware->data +
+ le32_to_cpu(section->offset));
return data;
}
@@ -257,37 +262,19 @@ static const u32 *bnx2x_sel_blob(u32 addr, const u32 *data, int is_e1)
static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
u32 len, int gunzip, int is_e1, u32 blob_off)
{
+ /* Assumes data contains 32-bit little endian values */
int offset = 0;
- data = bnx2x_sel_blob(addr, data, is_e1) + blob_off;
+ data = bnx2x_sel_blob(bp, addr, data) + blob_off;
if (gunzip) {
int rc;
-#ifdef __BIG_ENDIAN
- int i, size;
- u32 *temp;
-
- temp = kmalloc(len, GFP_KERNEL);
- size = (len / 4) + ((len % 4) ? 1 : 0);
- for (i = 0; i < size; i++)
- temp[i] = swab32(data[i]);
- data = temp;
-#endif
rc = bnx2x_gunzip(bp, (u8 *)data, len);
if (rc) {
BNX2X_ERR("gunzip failed ! rc %d\n", rc);
-#ifdef __BIG_ENDIAN
- kfree(temp);
-#endif
return;
}
len = bp->gunzip_outlen;
-#ifdef __BIG_ENDIAN
- kfree(temp);
- for (i = 0; i < len; i++)
- ((u32 *)bp->gunzip_buf)[i] =
- swab32(((u32 *)bp->gunzip_buf)[i]);
-#endif
} else {
if ((len * 4) > FW_BUF_SIZE) {
BNX2X_ERR("LARGE DMAE OPERATION ! "
@@ -296,6 +283,11 @@ static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
}
memcpy(bp->gunzip_buf, data, len * 4);
}
+#ifdef __BIG_ENDIAN
+ for (i = 0; i < len; i++)
+ ((u32 *)bp->gunzip_buf)[i] =
+ swab32(((u32 *)bp->gunzip_buf)[i]);
+#endif
if (bp->dmae_ready) {
while (len > DMAE_LEN32_WR_MAX) {
@@ -310,15 +302,24 @@ static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
bnx2x_init_ind_wr(bp, addr, bp->gunzip_buf, len);
}
-static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
+static int bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
{
int is_e1 = CHIP_IS_E1(bp);
int is_e1h = CHIP_IS_E1H(bp);
int is_emul_e1h = (CHIP_REV_IS_EMUL(bp) && is_e1h);
int hw_wr, i;
+ const struct raw_op *init_ops;
union init_op *op;
- u32 op_type, addr, len;
+ u32 op_type, addr, len, offset;
const u32 *data, *data_base;
+ const struct bnx2x_fw_file *fw_file;
+#ifdef __BIG_ENDIAN
+ union init_op real_op;
+ int j;
+ u32 *pos;
+#endif
+
+ fw_file = (struct bnx2x_fw_file *)bp->firmware->data;
if (CHIP_REV_IS_FPGA(bp))
hw_wr = OP_WR_FPGA;
@@ -327,14 +328,28 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
else
hw_wr = OP_WR_ASIC;
- if (is_e1)
- data_base = init_data_e1;
- else /* CHIP_IS_E1H(bp) */
- data_base = init_data_e1h;
+ /* Grab the init ops from the firmware */
+ len = le32_to_cpu(fw_file->init_ops.len);
+ offset = le32_to_cpu(fw_file->init_ops.offset);
+ if (!len || !offset || len + offset > bp->firmware->size)
+ return -EINVAL;
+ init_ops = (struct raw_op *)(bp->firmware->data + offset);
- for (i = op_start; i < op_end; i++) {
+ len = le32_to_cpu(fw_file->init_data.len);
+ offset = le32_to_cpu(fw_file->init_data.offset);
+ if (!len || !offset || len + offset > bp->firmware->size)
+ return -EINVAL;
+ data_base = (u32 *)(bp->firmware->data + offset);
+ for (i = op_start; i < op_end; i++) {
+#ifdef __BIG_ENDIAN
+ op = (union init_op *)&real_op;
+ pos = (u32 *)&init_ops[i];
+ for (j = 0; j < sizeof(union init_op) / 4; j++)
+ ((u32 *)op)[j] = le32_to_cpu(pos[j]);
+#else
op = (union init_op *)&(init_ops[i]);
+#endif
op_type = op->str_wr.op;
addr = op->str_wr.offset;
@@ -364,6 +379,22 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
op_type = OP_WR;
}
+#ifdef __BIG_ENDIAN
+ switch (op_type) {
+ case OP_SW:
+ case OP_SI:
+ case OP_WR_64:
+ pos = kmalloc(len * 4, GFP_KERNEL);
+ for (i = 0; i < len; i++)
+ pos[i] = le32_to_cpu(data[i]);
+ data = pos;
+ break;
+ default:
+ pos = NULL;
+ break;
+ }
+#endif
+
switch (op_type) {
case OP_RD:
REG_RD(bp, addr);
@@ -400,7 +431,12 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
#endif
break;
}
+#ifdef __BIG_ENDIAN
+ kfree(pos);
+#endif
}
+
+ return 0;
}
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 00a78e8..2723172 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -49,6 +49,7 @@
#include <linux/prefetch.h>
#include <linux/zlib.h>
#include <linux/io.h>
+#include <linux/firmware.h>
#include "bnx2x.h"
@@ -58,6 +59,8 @@
#define DRV_MODULE_VERSION "1.48.105"
#define DRV_MODULE_RELDATE "2009/03/02"
#define BNX2X_BC_VER 0x040200
+#define FW_FILE_E1 "bnx2x-e1-1.48.105.fw"
+#define FW_FILE_E1H "bnx2x-e1h-1.48.105.fw"
/* Time in jiffies before concluding the transmitter is hung */
#define TX_TIMEOUT (5*HZ)
@@ -70,6 +73,8 @@ MODULE_AUTHOR("Eliezer Tamir");
MODULE_DESCRIPTION("Broadcom NetXtreme II BCM57710/57711/57711E Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_MODULE_VERSION);
+MODULE_FIRMWARE(FW_FILE_E1);
+MODULE_FIRMWARE(FW_FILE_E1H);
static int multi_mode = 1;
module_param(multi_mode, int, 0);
@@ -11083,6 +11088,68 @@ static int __devinit bnx2x_get_pcie_speed(struct bnx2x *bp)
return val;
}
+static int __devinit bnx2x_check_firmware(const struct firmware *firmware)
+{
+ const struct bnx2x_fw_file *fw_file;
+ const struct bnx2x_fw_file_section *sections;
+ const u32 *ops_offsets;
+ u32 offset, len, num_ops;
+ int i;
+
+ if (firmware->size < sizeof(struct bnx2x_fw_file))
+ return -EINVAL;
+
+ fw_file = (struct bnx2x_fw_file *)firmware->data;
+ sections = (struct bnx2x_fw_file_section *)fw_file;
+
+ /* Make sure none of the offsets and sizes make us read beyond
+ * the end of the firmware data */
+ for (i = 0; i < sizeof(*fw_file) / sizeof(*sections); i++) {
+ offset = le32_to_cpu(sections[i].offset);
+ len = le32_to_cpu(sections[i].len);
+ if (offset + len > firmware->size)
+ return -EINVAL;
+ }
+
+ /* Likewise for the init_ops offsets */
+ offset = le32_to_cpu(fw_file->init_ops_offsets.offset);
+ ops_offsets = (u32 *)(firmware->data + offset);
+ num_ops = le32_to_cpu(fw_file->init_ops.len) / sizeof(struct raw_op);
+
+ for (i = 0; i < le32_to_cpu(fw_file->init_ops_offsets.len) / 4; i++) {
+ if (le32_to_cpu(ops_offsets[i]) >= num_ops)
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int __devinit bnx2x_request_firmware(struct bnx2x *bp,
+ struct device *dev)
+{
+ const char *fw_file = CHIP_IS_E1(bp) ? FW_FILE_E1 : FW_FILE_E1H;
+ int rc;
+
+ rc = request_firmware(&bp->firmware, fw_file, dev);
+ if (rc) {
+ printk(KERN_ERR PFX "Can't load firmware file %s\n", fw_file);
+ goto request_firmware_exit;
+ }
+
+ rc = bnx2x_check_firmware(bp->firmware);
+ if (rc) {
+ printk(KERN_ERR PFX "Corrupt firmware file %s\n", fw_file);
+ goto request_firmware_exit;
+ }
+
+ return 0;
+
+request_firmware_exit:
+ release_firmware(bp->firmware);
+
+ return rc;
+}
+
static int __devinit bnx2x_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
@@ -11116,6 +11183,12 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
if (rc)
goto init_one_exit;
+ rc = bnx2x_request_firmware(bp, &pdev->dev);
+ if (rc) {
+ printk(KERN_ERR PFX "Error loading firmware\n");
+ goto init_one_exit;
+ }
+
rc = register_netdev(dev);
if (rc) {
dev_err(&pdev->dev, "Cannot register net device\n");
@@ -11163,6 +11236,8 @@ static void __devexit bnx2x_remove_one(struct pci_dev *pdev)
unregister_netdev(dev);
+ release_firmware(bp->firmware);
+
if (bp->regview)
iounmap(bp->regview);
--
1.5.6.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 3/4] bnx2x: Get init_ops offsets from the firmware file
2009-04-04 22:15 ` [PATCH 2/4] " John Wright
@ 2009-04-04 22:15 ` John Wright
0 siblings, 0 replies; 3+ messages in thread
From: John Wright @ 2009-04-04 22:15 UTC (permalink / raw)
To: netdev; +Cc: Eilon Greenstein, John Wright
This removes the last dependency on bnx2x_init_values.h.
Signed-off-by: John Wright <john.wright@hp.com>
---
drivers/net/bnx2x_init.h | 283 +++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 280 insertions(+), 3 deletions(-)
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h
index 50fff14..b300b4e 100644
--- a/drivers/net/bnx2x_init.h
+++ b/drivers/net/bnx2x_init.h
@@ -73,6 +73,272 @@
#define OP_WR_FPGA 0x1e /* write single register on FPGA */
#define OP_WR_ASIC 0x1f /* write single register on ASIC */
+/* These are indexes into an array in the firmware file that gives the actual
+ * offsets for these chunks in the init_ops array */
+#define PRS_COMMON_START 0
+#define PRS_COMMON_END 1
+#define SRCH_COMMON_START 2
+#define SRCH_COMMON_END 3
+#define TSDM_COMMON_START 4
+#define TSDM_COMMON_END 5
+#define TCM_COMMON_START 6
+#define TCM_COMMON_END 7
+#define TCM_FUNC0_START 8
+#define TCM_FUNC0_END 9
+#define TCM_FUNC1_START 10
+#define TCM_FUNC1_END 11
+#define TCM_FUNC2_START 12
+#define TCM_FUNC2_END 13
+#define TCM_FUNC3_START 14
+#define TCM_FUNC3_END 15
+#define TCM_FUNC4_START 16
+#define TCM_FUNC4_END 17
+#define TCM_FUNC5_START 18
+#define TCM_FUNC5_END 19
+#define TCM_FUNC6_START 20
+#define TCM_FUNC6_END 21
+#define TCM_FUNC7_START 22
+#define TCM_FUNC7_END 23
+#define BRB1_COMMON_START 24
+#define BRB1_COMMON_END 25
+#define BRB1_PORT0_START 26
+#define BRB1_PORT0_END 27
+#define BRB1_PORT1_START 28
+#define BRB1_PORT1_END 29
+#define TSEM_COMMON_START 30
+#define TSEM_COMMON_END 31
+#define TSEM_PORT0_START 32
+#define TSEM_PORT0_END 33
+#define TSEM_PORT1_START 34
+#define TSEM_PORT1_END 35
+#define TSEM_FUNC0_START 36
+#define TSEM_FUNC0_END 37
+#define TSEM_FUNC1_START 38
+#define TSEM_FUNC1_END 39
+#define TSEM_FUNC2_START 40
+#define TSEM_FUNC2_END 41
+#define TSEM_FUNC3_START 42
+#define TSEM_FUNC3_END 43
+#define TSEM_FUNC4_START 44
+#define TSEM_FUNC4_END 45
+#define TSEM_FUNC5_START 46
+#define TSEM_FUNC5_END 47
+#define TSEM_FUNC6_START 48
+#define TSEM_FUNC6_END 49
+#define TSEM_FUNC7_START 50
+#define TSEM_FUNC7_END 51
+#define MISC_COMMON_START 52
+#define MISC_COMMON_END 53
+#define MISC_FUNC0_START 54
+#define MISC_FUNC0_END 55
+#define MISC_FUNC1_START 56
+#define MISC_FUNC1_END 57
+#define MISC_FUNC2_START 58
+#define MISC_FUNC2_END 59
+#define MISC_FUNC3_START 60
+#define MISC_FUNC3_END 61
+#define MISC_FUNC4_START 62
+#define MISC_FUNC4_END 63
+#define MISC_FUNC5_START 64
+#define MISC_FUNC5_END 65
+#define MISC_FUNC6_START 66
+#define MISC_FUNC6_END 67
+#define MISC_FUNC7_START 68
+#define MISC_FUNC7_END 69
+#define NIG_COMMON_START 70
+#define NIG_COMMON_END 71
+#define NIG_PORT0_START 72
+#define NIG_PORT0_END 73
+#define NIG_PORT1_START 74
+#define NIG_PORT1_END 75
+#define UPB_COMMON_START 76
+#define UPB_COMMON_END 77
+#define CSDM_COMMON_START 78
+#define CSDM_COMMON_END 79
+#define USDM_COMMON_START 80
+#define USDM_COMMON_END 81
+#define CCM_COMMON_START 82
+#define CCM_COMMON_END 83
+#define CCM_FUNC0_START 84
+#define CCM_FUNC0_END 85
+#define CCM_FUNC1_START 86
+#define CCM_FUNC1_END 87
+#define CCM_FUNC2_START 88
+#define CCM_FUNC2_END 89
+#define CCM_FUNC3_START 90
+#define CCM_FUNC3_END 91
+#define CCM_FUNC4_START 92
+#define CCM_FUNC4_END 93
+#define CCM_FUNC5_START 94
+#define CCM_FUNC5_END 95
+#define CCM_FUNC6_START 96
+#define CCM_FUNC6_END 97
+#define CCM_FUNC7_START 98
+#define CCM_FUNC7_END 99
+#define UCM_COMMON_START 100
+#define UCM_COMMON_END 101
+#define UCM_FUNC0_START 102
+#define UCM_FUNC0_END 103
+#define UCM_FUNC1_START 104
+#define UCM_FUNC1_END 105
+#define UCM_FUNC2_START 106
+#define UCM_FUNC2_END 107
+#define UCM_FUNC3_START 108
+#define UCM_FUNC3_END 109
+#define UCM_FUNC4_START 110
+#define UCM_FUNC4_END 111
+#define UCM_FUNC5_START 112
+#define UCM_FUNC5_END 113
+#define UCM_FUNC6_START 114
+#define UCM_FUNC6_END 115
+#define UCM_FUNC7_START 116
+#define UCM_FUNC7_END 117
+#define USEM_COMMON_START 118
+#define USEM_COMMON_END 119
+#define USEM_PORT0_START 120
+#define USEM_PORT0_END 121
+#define USEM_PORT1_START 122
+#define USEM_PORT1_END 123
+#define USEM_FUNC0_START 124
+#define USEM_FUNC0_END 125
+#define USEM_FUNC1_START 126
+#define USEM_FUNC1_END 127
+#define USEM_FUNC2_START 128
+#define USEM_FUNC2_END 129
+#define USEM_FUNC3_START 130
+#define USEM_FUNC3_END 131
+#define USEM_FUNC4_START 132
+#define USEM_FUNC4_END 133
+#define USEM_FUNC5_START 134
+#define USEM_FUNC5_END 135
+#define USEM_FUNC6_START 136
+#define USEM_FUNC6_END 137
+#define USEM_FUNC7_START 138
+#define USEM_FUNC7_END 139
+#define CSEM_COMMON_START 140
+#define CSEM_COMMON_END 141
+#define CSEM_PORT0_START 142
+#define CSEM_PORT0_END 143
+#define CSEM_PORT1_START 144
+#define CSEM_PORT1_END 145
+#define CSEM_FUNC0_START 146
+#define CSEM_FUNC0_END 147
+#define CSEM_FUNC1_START 148
+#define CSEM_FUNC1_END 149
+#define CSEM_FUNC2_START 150
+#define CSEM_FUNC2_END 151
+#define CSEM_FUNC3_START 152
+#define CSEM_FUNC3_END 153
+#define CSEM_FUNC4_START 154
+#define CSEM_FUNC4_END 155
+#define CSEM_FUNC5_START 156
+#define CSEM_FUNC5_END 157
+#define CSEM_FUNC6_START 158
+#define CSEM_FUNC6_END 159
+#define CSEM_FUNC7_START 160
+#define CSEM_FUNC7_END 161
+#define XPB_COMMON_START 162
+#define XPB_COMMON_END 163
+#define DQ_COMMON_START 164
+#define DQ_COMMON_END 165
+#define TIMERS_COMMON_START 166
+#define TIMERS_COMMON_END 167
+#define TIMERS_PORT0_START 168
+#define TIMERS_PORT0_END 169
+#define TIMERS_PORT1_START 170
+#define TIMERS_PORT1_END 171
+#define XSDM_COMMON_START 172
+#define XSDM_COMMON_END 173
+#define QM_COMMON_START 174
+#define QM_COMMON_END 175
+#define PBF_COMMON_START 176
+#define PBF_COMMON_END 177
+#define PBF_PORT0_START 178
+#define PBF_PORT0_END 179
+#define PBF_PORT1_START 180
+#define PBF_PORT1_END 181
+#define XCM_COMMON_START 182
+#define XCM_COMMON_END 183
+#define XCM_PORT0_START 184
+#define XCM_PORT0_END 185
+#define XCM_PORT1_START 186
+#define XCM_PORT1_END 187
+#define XCM_FUNC0_START 188
+#define XCM_FUNC0_END 189
+#define XCM_FUNC1_START 190
+#define XCM_FUNC1_END 191
+#define XCM_FUNC2_START 192
+#define XCM_FUNC2_END 193
+#define XCM_FUNC3_START 194
+#define XCM_FUNC3_END 195
+#define XCM_FUNC4_START 196
+#define XCM_FUNC4_END 197
+#define XCM_FUNC5_START 198
+#define XCM_FUNC5_END 199
+#define XCM_FUNC6_START 200
+#define XCM_FUNC6_END 201
+#define XCM_FUNC7_START 202
+#define XCM_FUNC7_END 203
+#define XSEM_COMMON_START 204
+#define XSEM_COMMON_END 205
+#define XSEM_PORT0_START 206
+#define XSEM_PORT0_END 207
+#define XSEM_PORT1_START 208
+#define XSEM_PORT1_END 209
+#define XSEM_FUNC0_START 210
+#define XSEM_FUNC0_END 211
+#define XSEM_FUNC1_START 212
+#define XSEM_FUNC1_END 213
+#define XSEM_FUNC2_START 214
+#define XSEM_FUNC2_END 215
+#define XSEM_FUNC3_START 216
+#define XSEM_FUNC3_END 217
+#define XSEM_FUNC4_START 218
+#define XSEM_FUNC4_END 219
+#define XSEM_FUNC5_START 220
+#define XSEM_FUNC5_END 221
+#define XSEM_FUNC6_START 222
+#define XSEM_FUNC6_END 223
+#define XSEM_FUNC7_START 224
+#define XSEM_FUNC7_END 225
+#define CDU_COMMON_START 226
+#define CDU_COMMON_END 227
+#define DMAE_COMMON_START 228
+#define DMAE_COMMON_END 229
+#define PXP_COMMON_START 230
+#define PXP_COMMON_END 231
+#define CFC_COMMON_START 232
+#define CFC_COMMON_END 233
+#define HC_COMMON_START 234
+#define HC_COMMON_END 235
+#define HC_PORT0_START 236
+#define HC_PORT0_END 237
+#define HC_PORT1_START 238
+#define HC_PORT1_END 239
+#define HC_FUNC0_START 240
+#define HC_FUNC0_END 241
+#define HC_FUNC1_START 242
+#define HC_FUNC1_END 243
+#define HC_FUNC2_START 244
+#define HC_FUNC2_END 245
+#define HC_FUNC3_START 246
+#define HC_FUNC3_END 247
+#define HC_FUNC4_START 248
+#define HC_FUNC4_END 249
+#define HC_FUNC5_START 250
+#define HC_FUNC5_END 251
+#define HC_FUNC6_START 252
+#define HC_FUNC6_END 253
+#define HC_FUNC7_START 254
+#define HC_FUNC7_END 255
+#define PXP2_COMMON_START 256
+#define PXP2_COMMON_END 257
+#define MISC_AEU_COMMON_START 258
+#define MISC_AEU_COMMON_END 259
+#define MISC_AEU_PORT0_START 260
+#define MISC_AEU_PORT0_END 261
+#define MISC_AEU_PORT1_START 262
+#define MISC_AEU_PORT1_END 263
struct raw_op {
u32 op:8;
@@ -118,8 +384,6 @@ union init_op {
struct raw_op raw;
};
-#include "bnx2x_init_values.h"
-
static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val);
static int bnx2x_gunzip(struct bnx2x *bp, u8 *zbuf, int len);
@@ -302,6 +566,18 @@ static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
bnx2x_init_ind_wr(bp, addr, bp->gunzip_buf, len);
}
+static u32 bnx2x_get_op_offset(struct bnx2x *bp, u32 op_offset_idx)
+{
+ const struct bnx2x_fw_file *fw_file;
+ const u32 *offsets;
+
+ fw_file = (struct bnx2x_fw_file *)bp->firmware->data;
+ offsets = (u32 *)(bp->firmware->data +
+ le32_to_cpu(fw_file->init_ops_offsets.offset));
+
+ return offsets[op_offset_idx];
+}
+
static int bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
{
int is_e1 = CHIP_IS_E1(bp);
@@ -341,7 +617,8 @@ static int bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
return -EINVAL;
data_base = (u32 *)(bp->firmware->data + offset);
- for (i = op_start; i < op_end; i++) {
+ for (i = bnx2x_get_op_offset(bp, op_start);
+ i < bnx2x_get_op_offset(bp, op_end); i++) {
#ifdef __BIG_ENDIAN
op = (union init_op *)&real_op;
pos = (u32 *)&init_ops[i];
--
1.5.6.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2009-04-04 22:15 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2009-04-04 22:15 bnx2x: Use request_firmware() John Wright
2009-04-04 22:15 ` [PATCH 2/4] " John Wright
2009-04-04 22:15 ` [PATCH 3/4] bnx2x: Get init_ops offsets from the firmware file John Wright
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