From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eric Dumazet <eric.dumazet@gmail.com>
Subject: Re: b44: Reset due to FIFO overflow.
Date: Mon, 28 Jun 2010 13:09:30 +0200
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Cc: Mitchell Erblich <erblichs@earthlink.net>, netdev@vger.kernel.org
To: James Courtier-Dutton <james.dutton@gmail.com>
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Le lundi 28 juin 2010 =C3=A0 11:17 +0100, James Courtier-Dutton a =C3=A9=
crit :
> On 28 June 2010 11:00, Eric Dumazet <eric.dumazet@gmail.com> wrote:
> >
> > Problem is we receive a spike of RX network frames (possibly UDP or=
 some
> > other RX only trafic), and chip raises an RX fifo overflow _error_
> > indication.
> >
>=20
> The cause of the RX overflow is in my case is TCP.
> It is reproducible in mythtv.
> While watching LiveTV, press "s" for the program guide.
> The program guide is implemented into mythtv by a SQL query that
> results in a large response.
> The kernel is probably not servicing the RX FIFO quickly enough due t=
o
> it being busy doing something else. In this case, probably a video
> mode switch.
>=20

Thats strange, b44 has a big RX ring... and tcp sender should wait for
ACK...

> > Some hardware are buggy enough that such error indication is fatal =
and
> > _require_ hardware reset. Thats life. I suspect b44 driver doing a =
full
> > reset is not a random guess from driver author, but to avoid a comp=
lete
> > NIC lockup.
> >
>=20
> Interesting, which hardware, apart from the b44, is it that "requires=
"
> a hardware reset after a RX FIFO overflow.

Just take a look at some net drivers and you'll see some of them have
this requirement.

rtl8169_rx_interrupt()
=2E..
	if (status & RxFOVF) {
		rtl8169_schedule_work(dev, rtl8169_reset_task);
		dev->stats.rx_fifo_errors++;
	}