Re: kernel panic in fib_rules_lookup [2.6.27.7 vendor-patched]

[Eric Dumazet <eric.dumazet@gmail.com>]

Le mardi 26 octobre 2010 à 09:29 -0400, Joe Buehler a écrit :
> Eric Dumazet wrote:
> 
> > With a normal workload, on a dual cpu machine, a missing memory barrier
> > can stay un-noticed for quite a long time. The race window is so small
> > that probability for the bug might be 0.0000001 % or something like
> > that :(
> 
> I'm looking at the LINUX source at the moment and not liking what I see
> in include/asm-mips/barrier.h:
> 
> #define smp_mb()	__asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory")
> #ifdef CONFIG_CPU_CAVIUM_OCTEON
> #define smp_rmb()	barrier()
> #define smp_wmb()	barrier()
> #else
> #define smp_rmb()	__asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory")
> #define smp_wmb()	__asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory")
> #endif
> 
> The Octeon documentation explicitly says that neither loads nor stores
> need execute in program order, so the definitions for smp_rmb and
> smp_wmb appear to be wrong wrong wrong.
> 
> It appears that smp_wmb should be making use of SYNCW and smp_rmb should
> be making use of SYNC.
> 
> Should I pursue this question on the main LINUX kernel list?

Well, it would be surprising this being wrong and crash only once in a
while in fib_rules_lookup

Did you tried my last patch ?