From: Eric Dumazet <eric.dumazet@gmail.com>
To: Christoph Lameter <cl@linux.com>
Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Andrew Morton <akpm@linux-foundation.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
David Miller <davem@davemloft.net>,
netdev <netdev@vger.kernel.org>,
Arnaldo Carvalho de Melo <acme@infradead.org>,
Ingo Molnar <mingo@elte.hu>, Andi Kleen <andi@firstfloor.org>,
Nick Piggin <npiggin@kernel.dk>
Subject: Re: [PATCH] atomic: add atomic_inc_not_zero_hint()
Date: Mon, 15 Nov 2010 15:47:07 +0100 [thread overview]
Message-ID: <1289832427.2607.84.camel@edumazet-laptop> (raw)
In-Reply-To: <alpine.DEB.2.00.1011150821000.19175@router.home>
Le lundi 15 novembre 2010 à 08:25 -0600, Christoph Lameter a écrit :
> On Mon, 15 Nov 2010, Eric Dumazet wrote:
>
> > Exclusive access ? As soon as another cpu takes it again, you lose.
>
> Sure but you want to avoid the fetch in shared mode here.
>
Yes, this is what cmpxchg() does for sure.
> > Its not really the same thing... Maybe you miss the 'hint' intention at
> > all. We know the probable value of the counter, we dont want to read it.
>
> Ok may be in thise case you can predict the value but in general it is
> difficult to always provide an expected value. It would be easier to be
> able to tell the processor that the cacheline should not be fetched as
> shared but immediately in exclusive state.
>
Maybe its not clear, but atomic_inc_not_zero_hint() is going to be used
only in contexts we know the expected value, and not as a generic
replacement for atomic_inc_not_zero(). Even if cache line is already hot
in this cpu cache, it should be faster or same speed.
Then, in high contention contexts, using atomic_inc_not_zero_hint() with
whatever initial hint might also be a win over atomic_inc_not_zero(),
but we try to remove such contexts ;)
And two atomic_cmpxchg() are probably slower in non contended contexts,
in particular is cache line is already hot in this cpu cache.
> > atomic_read() and atomic_cmpxchg(). We tried prefetchw() and it was a
> > performance drop. It was with only 16 cpus contending on neighbour
>
> Does prefetchw work? Andi claims that prefetchw is not working on
> x86 and I doubt that you ran tests on Itanium.
In fact, in benchmarks, prefetch() or prefetchw() are a pain on x86, or
at least "perf tools" show artifact on them (high number of cycles
consumed on these instructions)
Andi had a patch to disable prefetch() in list iterators, and its a win.
I dont have Itanium platform to run tests. Is cmpxchg() that bad on
ia64 ? I also have old AMD cpus, so I cannot say if recent ones handle
prefetchw() better...
next prev parent reply other threads:[~2010-11-15 14:47 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-05 16:53 [PATCH] atomic: add atomic_inc_not_zero_hint() Eric Dumazet
2010-11-05 17:20 ` Andrew Morton
2010-11-05 18:00 ` Eric Dumazet
2010-11-05 18:08 ` Andrew Morton
2010-11-05 18:20 ` Eric Dumazet
2010-11-05 18:28 ` Andrew Morton
2010-11-05 19:20 ` Eric Dumazet
2010-11-05 19:39 ` Andrew Morton
2010-11-05 19:46 ` Eric Dumazet
2010-11-05 19:51 ` Paul E. McKenney
2010-11-12 19:14 ` Christoph Lameter
2010-11-13 22:26 ` Paul E. McKenney
2010-11-15 13:57 ` Christoph Lameter
2010-11-15 14:07 ` Andi Kleen
2010-11-15 14:16 ` Christoph Lameter
2010-11-15 14:17 ` Eric Dumazet
2010-11-15 14:25 ` Christoph Lameter
2010-11-15 14:39 ` Andi Kleen
2010-11-15 14:47 ` Eric Dumazet [this message]
2010-11-05 18:40 ` Paul E. McKenney
2010-11-05 19:12 ` Eric Dumazet
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