From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jeff Kirsher Subject: [PATCH 20/27] e1000e: 82577/8/9 mis-configured OEM bits during S0->Sx Date: Fri, 10 Dec 2010 22:19:07 -0800 Message-ID: <1292048354-22076-9-git-send-email-jeffrey.t.kirsher@intel.com> References: <1292048354-22076-1-git-send-email-jeffrey.t.kirsher@intel.com> Cc: Bruce Allan , netdev@vger.kernel.org, gospo@redhat.com, bphilips@novell.com, Jeff Kirsher Return-path: Received: from qmta06.emeryville.ca.mail.comcast.net ([76.96.30.56]:34189 "EHLO qmta06.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751915Ab0LKGTj (ORCPT ); Sat, 11 Dec 2010 01:19:39 -0500 To: davem@davemloft.net In-Reply-To: <1292048354-22076-1-git-send-email-jeffrey.t.kirsher@intel.com> To: davem@davemloft.net Sender: netdev-owner@vger.kernel.org List-ID: From: Bruce Allan The LPLU (Low Power Link Up) and Gigabit Disable bits (a.k.a. OEM bits) were being configured incorrectly when device goes to D3 state. Signed-off-by: Bruce Allan Tested-by: Jeff Pieper Signed-off-by: Jeff Kirsher --- drivers/net/e1000e/ich8lan.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index e3374d9..d7fc930 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c @@ -3591,7 +3591,7 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) ew32(PHY_CTRL, phy_ctrl); if (hw->mac.type >= e1000_pchlan) { - e1000_oem_bits_config_ich8lan(hw, true); + e1000_oem_bits_config_ich8lan(hw, false); ret_val = hw->phy.ops.acquire(hw); if (ret_val) return; -- 1.7.3.2