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* [PATCH 0/1] DSA: Enable cascading for multiple 6131 chips
@ 2011-06-20 20:40 Barry Grussling
  2011-06-20 20:40 ` [PATCH 1/1] Allow cascading to work with 6131 chip Barry Grussling
  0 siblings, 1 reply; 3+ messages in thread
From: Barry Grussling @ 2011-06-20 20:40 UTC (permalink / raw)
  To: netdev; +Cc: buytenh, Barry Grussling

I found that the Cascade Port field of the 6131 was always set
to 0xe which results in from_cpu frames being discarded.  This
means cascading style multi chip DSA configuration didn't work
for me.  I am a little confused by this since we configure the 
DSA routing table a little further down in the function.  

It seems like we need to enable cascading by setting the 
Cascade Port field to 0xf if we are in a multi-chip scenario.

Barry Grussling (1):
  Allow cascading to work with 6131 chip

 net/dsa/mv88e6131.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 1/1] Allow cascading to work with 6131 chip
  2011-06-20 20:40 [PATCH 0/1] DSA: Enable cascading for multiple 6131 chips Barry Grussling
@ 2011-06-20 20:40 ` Barry Grussling
  2011-06-20 21:18   ` David Miller
  0 siblings, 1 reply; 3+ messages in thread
From: Barry Grussling @ 2011-06-20 20:40 UTC (permalink / raw)
  To: netdev; +Cc: buytenh, Barry Grussling

---
 net/dsa/mv88e6131.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/net/dsa/mv88e6131.c b/net/dsa/mv88e6131.c
index 45f7411..1a1d1d1 100644
--- a/net/dsa/mv88e6131.c
+++ b/net/dsa/mv88e6131.c
@@ -118,10 +118,14 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
 	REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1100) | 0x00f0);
 
 	/*
-	 * Disable cascade port functionality, and set the switch's
+	 * Disable cascade port functionality unless this device is
+    * used in a cascade configuration, and set the switch's
 	 * DSA device number.
 	 */
-	REG_WRITE(REG_GLOBAL, 0x1c, 0xe000 | (ds->index & 0x1f));
+   if (ds->dst->pd->nr_chips > 1)
+      REG_WRITE(REG_GLOBAL, 0x1c, 0xf000 | (ds->index & 0x1f));
+   else
+      REG_WRITE(REG_GLOBAL, 0x1c, 0xe000 | (ds->index & 0x1f));
 
 	/*
 	 * Send all frames with destination addresses matching
-- 
1.7.0.4


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH 1/1] Allow cascading to work with 6131 chip
  2011-06-20 20:40 ` [PATCH 1/1] Allow cascading to work with 6131 chip Barry Grussling
@ 2011-06-20 21:18   ` David Miller
  0 siblings, 0 replies; 3+ messages in thread
From: David Miller @ 2011-06-20 21:18 UTC (permalink / raw)
  To: barry; +Cc: netdev, buytenh

From: Barry Grussling <barry@grussling.com>
Date: Mon, 20 Jun 2011 13:40:33 -0700

> ---
>  net/dsa/mv88e6131.c |    8 ++++++--
>  1 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/net/dsa/mv88e6131.c b/net/dsa/mv88e6131.c
> index 45f7411..1a1d1d1 100644
> --- a/net/dsa/mv88e6131.c
> +++ b/net/dsa/mv88e6131.c
> @@ -118,10 +118,14 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
>  	REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1100) | 0x00f0);
>  
>  	/*
> -	 * Disable cascade port functionality, and set the switch's
> +	 * Disable cascade port functionality unless this device is
> +    * used in a cascade configuration, and set the switch's

This screws up the formatting, please don't do this.

The line is not aligned properly, it uses spaces instead of
TAB characters, etc. etc. etc.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2011-06-20 21:18 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2011-06-20 20:40 [PATCH 0/1] DSA: Enable cascading for multiple 6131 chips Barry Grussling
2011-06-20 20:40 ` [PATCH 1/1] Allow cascading to work with 6131 chip Barry Grussling
2011-06-20 21:18   ` David Miller

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