From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jeff Kirsher Subject: [net-next 1/5] igb: Fix lack of flush after register write and before delay Date: Sat, 9 Jul 2011 04:50:36 -0700 Message-ID: <1310212240-24623-2-git-send-email-jeffrey.t.kirsher@intel.com> References: <1310212240-24623-1-git-send-email-jeffrey.t.kirsher@intel.com> Cc: Carolyn Wyborny , netdev@vger.kernel.org, gospo@redhat.com, Jeff Kirsher To: davem@davemloft.net Return-path: Received: from mga01.intel.com ([192.55.52.88]:29537 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753348Ab1GILuo (ORCPT ); Sat, 9 Jul 2011 07:50:44 -0400 In-Reply-To: <1310212240-24623-1-git-send-email-jeffrey.t.kirsher@intel.com> Sender: netdev-owner@vger.kernel.org List-ID: From: Carolyn Wyborny Register writes followed by a delay are required to have a flush before the delay in order to commit the values to the register. Without the flush, the code following the delay may not function correctly. Reported-by: Tong Ho Reported-by: Guenter Roeck Signed-off-by: Carolyn Wyborny Tested-by: Aaron Brown Signed-off-by: Jeff Kirsher --- drivers/net/igb/e1000_82575.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index 0f563c8..493e331 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c @@ -1735,6 +1735,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw) ctrl |= E1000_CTRL_RST; wr32(E1000_CTRL, ctrl); + wrfl(); /* Add delay to insure DEV_RST has time to complete */ if (global_device_reset) -- 1.7.6