From mboxrd@z Thu Jan 1 00:00:00 1970 From: Florian Fainelli Subject: Re: [PATCH net-next 2/5] net: phy: mscc: Add EEE init sequence Date: Fri, 14 Sep 2018 19:21:09 -0700 Message-ID: <1321f1a0-57af-a059-f78a-a699da94c064@gmail.com> References: <64809c5f01f3c6407257553a286b82949cef1ac0.1536913944.git-series.quentin.schulz@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Cc: allan.nielsen@microchip.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, thomas.petazzoni@bootlin.com, Raju Lakkaraju To: Quentin Schulz , davem@davemloft.net, andrew@lunn.ch Return-path: In-Reply-To: <64809c5f01f3c6407257553a286b82949cef1ac0.1536913944.git-series.quentin.schulz@bootlin.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-Id: netdev.vger.kernel.org On 09/14/18 01:33, Quentin Schulz wrote: > From: Raju Lakkaraju > > Microsemi PHYs (VSC 8530/31/40/41) need to update the Energy Efficient > Ethernet initialization sequence. > In order to avoid certain link state errors that could result in link > drops and packet loss, the physical coding sublayer (PCS) must be > updated with settings related to EEE in order to improve performance. > > Signed-off-by: Raju Lakkaraju > Signed-off-by: Quentin Schulz > --- [snip] > + vsc85xx_tr_write(phydev, 0x0f82, 0x0012b00a); Can you just make this an array of register + value pair? That would be less error prone in case you need to update that sequence in the future. With that: Reviewed-by: Florian Fainelli -- Florian