From mboxrd@z Thu Jan 1 00:00:00 1970 From: xiong Subject: [PATCH 01/10] atl1c: add workaround for issue of bit INTX-disable for MSI interrupt Date: Sat, 28 Apr 2012 09:58:36 +0800 Message-ID: <1335578325-21326-2-git-send-email-xiong@qca.qualcomm.com> References: <1335578325-21326-1-git-send-email-xiong@qca.qualcomm.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , xiong To: , , Return-path: Received: from wolverine01.qualcomm.com ([199.106.114.254]:34550 "EHLO wolverine01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758833Ab2D1B7L (ORCPT ); Fri, 27 Apr 2012 21:59:11 -0400 In-Reply-To: <1335578325-21326-1-git-send-email-xiong@qca.qualcomm.com> Sender: netdev-owner@vger.kernel.org List-ID: All supported devices have one issue that msi interrupt doesn't assert if pci command register bit (PCI_COMMAND_INTX_DISABLE) is set. Add workaround in drivers/pci/quirks.c Signed-off-by: xiong --- drivers/pci/quirks.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 4bf7102..953ec3f 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2626,6 +2626,18 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4374, DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375, quirk_msi_intx_disable_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1062, + quirk_msi_intx_disable_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1063, + quirk_msi_intx_disable_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2060, + quirk_msi_intx_disable_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2062, + quirk_msi_intx_disable_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1073, + quirk_msi_intx_disable_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1083, + quirk_msi_intx_disable_bug); #endif /* CONFIG_PCI_MSI */ /* Allow manual resource allocation for PCI hotplug bridges -- 1.7.7