From mboxrd@z Thu Jan 1 00:00:00 1970 From: xiong Subject: [PATCH 06/10] atl1c: enlarge L1 response waiting timer Date: Tue, 1 May 2012 09:38:54 +0800 Message-ID: <1335836338-9425-7-git-send-email-xiong@qca.qualcomm.com> References: <1335836338-9425-1-git-send-email-xiong@qca.qualcomm.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , , xiong To: , , Return-path: In-Reply-To: <1335836338-9425-1-git-send-email-xiong@qca.qualcomm.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: netdev.vger.kernel.org The hardware incorrectly process L0S/L1 entrance if the chipset/root response after specific/shorter timer and cause system hang. Enlarge the timeout value to avoid this issue. Signed-off-by: xiong Tested-by: Liu David --- drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h index 21a5bc1..17d935b 100644 --- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h +++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h @@ -157,7 +157,7 @@ void atl1c_post_phy_linkchg(struct atl1c_hw *hw, u16 link_speed); #define PM_CTRL_PM_REQ_TIMER_MASK 0xFUL #define PM_CTRL_PM_REQ_TIMER_SHIFT 20 /* pm_request_l1 time > @ * ->L0s not L1 */ -#define PM_CTRL_PM_REQ_TO_DEF 0xC +#define PM_CTRL_PM_REQ_TO_DEF 0xF #define PMCTRL_TXL1_AFTER_L0S BIT(19) /* l1dv2.0+ */ #define L1D_PMCTRL_L1_ENTRY_TM_MASK 7UL /* l1dv2.0+, 3bits */ #define L1D_PMCTRL_L1_ENTRY_TM_SHIFT 16 -- 1.7.7