From: Daniel Mack <zonque@gmail.com>
To: netdev@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org,
Daniel Mack <zonque@gmail.com>,
Mugunthan V N <mugunthanvnm@ti.com>,
Vaibhav Hiremath <hvaibhav@ti.com>,
"David S. Miller" <davem@davemloft.net>
Subject: [PATCH 2/2] net: ti cpsw ethernet: set IFCTL_{A,B} bits for RMII mode
Date: Wed, 26 Sep 2012 19:24:28 +0200 [thread overview]
Message-ID: <1348680268-8194-2-git-send-email-zonque@gmail.com> (raw)
In-Reply-To: <1348680268-8194-1-git-send-email-zonque@gmail.com>
For RMII mode operation in 100Mbps, the CPSW needs to set the
IFCTL_A / IFCTL_B bits in the MACCONTROL register.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/ti/cpsw.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 3d7594e..d88dbfa 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -386,6 +386,12 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
mac_control |= BIT(7); /* GIGABITEN */
if (phy->duplex)
mac_control |= BIT(0); /* FULLDUPLEXEN */
+
+ /* set speed_in input in case RMII mode is used in >10Mbps */
+ if (phy->speed > 10 && slave->slave_num < 2 &&
+ phy->interface == PHY_INTERFACE_MODE_RMII)
+ mac_control |= BIT(15 + slave->slave_num);
+
*link = true;
} else {
mac_control = 0;
--
1.7.11.4
next prev parent reply other threads:[~2012-09-26 17:24 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-26 17:24 [PATCH 1/2] net: ti cpsw ethernet: allow reading phy interface mode from DT Daniel Mack
2012-09-26 17:24 ` Daniel Mack [this message]
2012-09-26 18:50 ` [PATCH 2/2] net: ti cpsw ethernet: set IFCTL_{A,B} bits for RMII mode N, Mugunthan V
2012-09-27 11:42 ` Daniel Mack
[not found] ` <1348680268-8194-1-git-send-email-zonque-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-01 21:11 ` [PATCH 1/2] net: ti cpsw ethernet: allow reading phy interface mode from DT David Miller
2012-10-01 21:15 ` Daniel Mack
2012-10-01 21:38 ` David Miller
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