* [PATCH] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
@ 2012-09-27 11:50 Daniel Mack
2012-09-27 18:40 ` N, Mugunthan V
0 siblings, 1 reply; 2+ messages in thread
From: Daniel Mack @ 2012-09-27 11:50 UTC (permalink / raw)
To: netdev; +Cc: Daniel Mack, Mugunthan V N, Vaibhav Hiremath, David S. Miller
For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the
IFCTL_A bits in the MACCONTROL register. For all other PHY modes, this
bit is unused, so setting it unconditionally shouldn't cause any
trouble.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/ti/cpsw.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index aa78168..b764f75 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -386,6 +386,11 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
mac_control |= BIT(7); /* GIGABITEN */
if (phy->duplex)
mac_control |= BIT(0); /* FULLDUPLEXEN */
+
+ /* set speed_in input in case RMII mode is used in >10Mbps */
+ if (phy->speed > 10)
+ mac_control |= BIT(15);
+
*link = true;
} else {
mac_control = 0;
--
1.7.11.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* RE: [PATCH] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
2012-09-27 11:50 [PATCH] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL Daniel Mack
@ 2012-09-27 18:40 ` N, Mugunthan V
0 siblings, 0 replies; 2+ messages in thread
From: N, Mugunthan V @ 2012-09-27 18:40 UTC (permalink / raw)
To: Daniel Mack, netdev@vger.kernel.org; +Cc: Hiremath, Vaibhav, David S. Miller
> -----Original Message-----
> From: Daniel Mack [mailto:zonque@gmail.com]
> Sent: Thursday, September 27, 2012 5:21 PM
> To: netdev@vger.kernel.org
> Cc: Daniel Mack; N, Mugunthan V; Hiremath, Vaibhav; David S. Miller
> Subject: [PATCH] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
>
> For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the
> IFCTL_A bits in the MACCONTROL register. For all other PHY modes, this
> bit is unused, so setting it unconditionally shouldn't cause any
> trouble.
>
> Signed-off-by: Daniel Mack <zonque@gmail.com>
> Cc: Mugunthan V N <mugunthanvnm@ti.com>
> Cc: Vaibhav Hiremath <hvaibhav@ti.com>
> Cc: David S. Miller <davem@davemloft.net>
> ---
> drivers/net/ethernet/ti/cpsw.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/net/ethernet/ti/cpsw.c
> b/drivers/net/ethernet/ti/cpsw.c
> index aa78168..b764f75 100644
> --- a/drivers/net/ethernet/ti/cpsw.c
> +++ b/drivers/net/ethernet/ti/cpsw.c
> @@ -386,6 +386,11 @@ static void _cpsw_adjust_link(struct cpsw_slave
> *slave,
> mac_control |= BIT(7); /* GIGABITEN */
> if (phy->duplex)
> mac_control |= BIT(0); /* FULLDUPLEXEN */
> +
> + /* set speed_in input in case RMII mode is used in >10Mbps
> */
> + if (phy->speed > 10)
Please change the speed check as == 100 as it is required only for 100Mbps link
Regards
Mugunthan V N
> + mac_control |= BIT(15);
> +
> *link = true;
> } else {
> mac_control = 0;
> --
> 1.7.11.4
^ permalink raw reply [flat|nested] 2+ messages in thread
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