* [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
@ 2012-09-27 19:19 Daniel Mack
2012-10-01 9:25 ` Daniel Mack
2012-10-01 21:09 ` David Miller
0 siblings, 2 replies; 4+ messages in thread
From: Daniel Mack @ 2012-09-27 19:19 UTC (permalink / raw)
To: netdev; +Cc: Daniel Mack, Mugunthan V N, Vaibhav Hiremath, David S. Miller
For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the
IFCTL_A bits in the MACCONTROL register. For all other PHY modes, this
bit is unused, so setting it unconditionally shouldn't cause any
trouble.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/ti/cpsw.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index aa78168..fb1a692 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -386,6 +386,11 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
mac_control |= BIT(7); /* GIGABITEN */
if (phy->duplex)
mac_control |= BIT(0); /* FULLDUPLEXEN */
+
+ /* set speed_in input in case RMII mode is used in 100Mbps */
+ if (phy->speed == 100)
+ mac_control |= BIT(15);
+
*link = true;
} else {
mac_control = 0;
--
1.7.11.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
2012-09-27 19:19 [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL Daniel Mack
@ 2012-10-01 9:25 ` Daniel Mack
2012-10-01 10:52 ` N, Mugunthan V
2012-10-01 21:09 ` David Miller
1 sibling, 1 reply; 4+ messages in thread
From: Daniel Mack @ 2012-10-01 9:25 UTC (permalink / raw)
To: Daniel Mack; +Cc: netdev, Mugunthan V N, Vaibhav Hiremath, David S. Miller
On 27.09.2012 21:19, Daniel Mack wrote:
> For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the
> IFCTL_A bits in the MACCONTROL register. For all other PHY modes, this
> bit is unused, so setting it unconditionally shouldn't cause any
> trouble.
>
> Signed-off-by: Daniel Mack <zonque@gmail.com>
> Cc: Mugunthan V N <mugunthanvnm@ti.com>
> Cc: Vaibhav Hiremath <hvaibhav@ti.com>
> Cc: David S. Miller <davem@davemloft.net>
Mugunthan, are you ok with this version? Don't know if it's too late for
the 3.7 spin though, given that the merge window just opened.
Daniel
> ---
> drivers/net/ethernet/ti/cpsw.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
> index aa78168..fb1a692 100644
> --- a/drivers/net/ethernet/ti/cpsw.c
> +++ b/drivers/net/ethernet/ti/cpsw.c
> @@ -386,6 +386,11 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
> mac_control |= BIT(7); /* GIGABITEN */
> if (phy->duplex)
> mac_control |= BIT(0); /* FULLDUPLEXEN */
> +
> + /* set speed_in input in case RMII mode is used in 100Mbps */
> + if (phy->speed == 100)
> + mac_control |= BIT(15);
> +
> *link = true;
> } else {
> mac_control = 0;
>
^ permalink raw reply [flat|nested] 4+ messages in thread* RE: [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
2012-10-01 9:25 ` Daniel Mack
@ 2012-10-01 10:52 ` N, Mugunthan V
0 siblings, 0 replies; 4+ messages in thread
From: N, Mugunthan V @ 2012-10-01 10:52 UTC (permalink / raw)
To: Daniel Mack; +Cc: netdev@vger.kernel.org, Hiremath, Vaibhav, David S. Miller
> -----Original Message-----
> From: Daniel Mack [mailto:zonque@gmail.com]
> Sent: Monday, October 01, 2012 2:55 PM
> To: Daniel Mack
> Cc: netdev@vger.kernel.org; N, Mugunthan V; Hiremath, Vaibhav; David S.
> Miller
> Subject: Re: [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in
> MACCONTROL
>
> On 27.09.2012 21:19, Daniel Mack wrote:
> > For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the
> > IFCTL_A bits in the MACCONTROL register. For all other PHY modes,
> this
> > bit is unused, so setting it unconditionally shouldn't cause any
> > trouble.
> >
> > Signed-off-by: Daniel Mack <zonque@gmail.com>
> > Cc: Mugunthan V N <mugunthanvnm@ti.com>
> > Cc: Vaibhav Hiremath <hvaibhav@ti.com>
> > Cc: David S. Miller <davem@davemloft.net>
>
> Mugunthan, are you ok with this version? Don't know if it's too late
> for
> the 3.7 spin though, given that the merge window just opened.
>
>
> Daniel
I am ok with the patch
Regards
Mugunthan V N
>
>
> > ---
> > drivers/net/ethernet/ti/cpsw.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/ti/cpsw.c
> b/drivers/net/ethernet/ti/cpsw.c
> > index aa78168..fb1a692 100644
> > --- a/drivers/net/ethernet/ti/cpsw.c
> > +++ b/drivers/net/ethernet/ti/cpsw.c
> > @@ -386,6 +386,11 @@ static void _cpsw_adjust_link(struct cpsw_slave
> *slave,
> > mac_control |= BIT(7); /* GIGABITEN */
> > if (phy->duplex)
> > mac_control |= BIT(0); /* FULLDUPLEXEN */
> > +
> > + /* set speed_in input in case RMII mode is used in 100Mbps
> */
> > + if (phy->speed == 100)
> > + mac_control |= BIT(15);
> > +
> > *link = true;
> > } else {
> > mac_control = 0;
> >
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
2012-09-27 19:19 [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL Daniel Mack
2012-10-01 9:25 ` Daniel Mack
@ 2012-10-01 21:09 ` David Miller
1 sibling, 0 replies; 4+ messages in thread
From: David Miller @ 2012-10-01 21:09 UTC (permalink / raw)
To: zonque; +Cc: netdev, mugunthanvnm, hvaibhav
From: Daniel Mack <zonque@gmail.com>
Date: Thu, 27 Sep 2012 21:19:34 +0200
> For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the
> IFCTL_A bits in the MACCONTROL register. For all other PHY modes, this
> bit is unused, so setting it unconditionally shouldn't cause any
> trouble.
>
> Signed-off-by: Daniel Mack <zonque@gmail.com>
Applied.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2012-09-27 19:19 [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL Daniel Mack
2012-10-01 9:25 ` Daniel Mack
2012-10-01 10:52 ` N, Mugunthan V
2012-10-01 21:09 ` David Miller
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