RE: Realtek 8139 problem on 486.

[David Laight <David.Laight@ACULAB.COM>]

From: Nikolai Zhubr
> Sent: 08 July 2021 20:22
...
> 22.06.2021 14:12, David Laight:
>  > Typically you need to:
>  > 1) stop the chip driving IRQ low.
>  > 2) process all the completed RX and TX entries.
>  > 3) clear the chip's interrupt pending bits (often write to clear).
>  > 4) check for completed RX/TX entries, back to 2 if found.
>  > 5) enable driving IRQ.
>  >
>  > The loop (4) is needed because of the timing window between
>  > (2) and (3).
>  > You can swap (2) and (3) over - but then you get an additional
>  > interrupt if packets arrive during processing - which is common.
> 
> So in terms of such outline, the "poll approach" now implements 1, 2, 3,
> 5 but still misses 4, and my understanding is that it is therefore still
> not a complete solution for the broken triggering case (Although
> practically, the time window might be too small for the race effect to
> be ever observable) From my previous testing I know that such a loop
> does not affect the perfomance too much anyway, so it seems quite safe
> to add it. Maybe I've missunderstood something though.

The timing window (4) happens.
The next receive packet will usually clear it - but that might require a timeout.
I'm sure I got a trip to Sweden out of it.

I also think Linux requires the tx-reap be done in a timely manner.
If that is only done in response to an end of tx interrupt the delay
could be substantial.

	David

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