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* [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs
@ 2012-11-06 10:08 Steve Glendinning
  2012-11-07 20:39 ` David Miller
  2012-11-09 21:08 ` David Miller
  0 siblings, 2 replies; 5+ messages in thread
From: Steve Glendinning @ 2012-11-06 10:08 UTC (permalink / raw)
  To: netdev; +Cc: Steve Glendinning

The device datasheet specifies the BUSY bit must be set when reading
or writing phy registers.  This patch ensures we do that.

Signed-off-by: Steve Glendinning <steve.glendinning@shawell.net>
---
 drivers/net/usb/smsc95xx.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
index 34f2e78..69efe66 100644
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
@@ -167,7 +167,7 @@ static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
 	/* set the address, index & direction (read from PHY) */
 	phy_id &= dev->mii.phy_id_mask;
 	idx &= dev->mii.reg_num_mask;
-	addr = (phy_id << 11) | (idx << 6) | MII_READ_;
+	addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
 	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
 	check_warn_goto_done(ret, "Error writing MII_ADDR");
 
@@ -204,7 +204,7 @@ static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
 	/* set the address, index & direction (write to PHY) */
 	phy_id &= dev->mii.phy_id_mask;
 	idx &= dev->mii.reg_num_mask;
-	addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
+	addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
 	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
 	check_warn_goto_done(ret, "Error writing MII_ADDR");
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs
  2012-11-06 10:08 [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs Steve Glendinning
@ 2012-11-07 20:39 ` David Miller
  2012-11-09 21:08 ` David Miller
  1 sibling, 0 replies; 5+ messages in thread
From: David Miller @ 2012-11-07 20:39 UTC (permalink / raw)
  To: steve.glendinning; +Cc: netdev

From: Steve Glendinning <steve.glendinning@shawell.net>
Date: Tue,  6 Nov 2012 10:08:53 +0000

> The device datasheet specifies the BUSY bit must be set when reading
> or writing phy registers.  This patch ensures we do that.
> 
> Signed-off-by: Steve Glendinning <steve.glendinning@shawell.net>

Steve, what's the story here?  Where is patch #1?

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs
  2012-11-06 10:08 [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs Steve Glendinning
  2012-11-07 20:39 ` David Miller
@ 2012-11-09 21:08 ` David Miller
  2012-11-13 17:44   ` Steve Glendinning
  1 sibling, 1 reply; 5+ messages in thread
From: David Miller @ 2012-11-09 21:08 UTC (permalink / raw)
  To: steve.glendinning; +Cc: netdev

From: Steve Glendinning <steve.glendinning@shawell.net>
Date: Tue,  6 Nov 2012 10:08:53 +0000

> The device datasheet specifies the BUSY bit must be set when reading
> or writing phy registers.  This patch ensures we do that.
> 
> Signed-off-by: Steve Glendinning <steve.glendinning@shawell.net>

Steve please let me know why you only submitted patch #2
of an apparent 2 part series.

If I don't get a response soon I'm just going to toss this
patch instead of letting it simply rot in patchwork.

Thanks.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs
  2012-11-09 21:08 ` David Miller
@ 2012-11-13 17:44   ` Steve Glendinning
  2012-11-13 19:26     ` David Miller
  0 siblings, 1 reply; 5+ messages in thread
From: Steve Glendinning @ 2012-11-13 17:44 UTC (permalink / raw)
  To: David Miller; +Cc: netdev

> Steve please let me know why you only submitted patch #2
> of an apparent 2 part series.

My bad being sloppy when formatting the patch for submission, sorry.
The first patch in my rebased tree was one you've already accepted
into net but hadn't pulled into net-next yet.  I just sent the second
one, and I forgot to remove the 2/2 from it.

They don't depend on each other, they're independent bugfixes.

Sorry again for the sloppyness.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs
  2012-11-13 17:44   ` Steve Glendinning
@ 2012-11-13 19:26     ` David Miller
  0 siblings, 0 replies; 5+ messages in thread
From: David Miller @ 2012-11-13 19:26 UTC (permalink / raw)
  To: steve; +Cc: netdev

From: Steve Glendinning <steve@shawell.net>
Date: Tue, 13 Nov 2012 17:44:39 +0000

>> Steve please let me know why you only submitted patch #2
>> of an apparent 2 part series.
> 
> My bad being sloppy when formatting the patch for submission, sorry.
> The first patch in my rebased tree was one you've already accepted
> into net but hadn't pulled into net-next yet.  I just sent the second
> one, and I forgot to remove the 2/2 from it.
> 
> They don't depend on each other, they're independent bugfixes.
> 
> Sorry again for the sloppyness.

Thanks for the clarification, applied, thanks.

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2012-11-13 19:26 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-11-06 10:08 [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs Steve Glendinning
2012-11-07 20:39 ` David Miller
2012-11-09 21:08 ` David Miller
2012-11-13 17:44   ` Steve Glendinning
2012-11-13 19:26     ` David Miller

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