From: David Woodhouse <dwmw2@infradead.org>
To: Francois Romieu <romieu@fr.zoreil.com>
Cc: Jeff Garzik <jgarzik@pobox.com>,
David Miller <davem@davemloft.net>,
jasowang@redhat.com, netdev@vger.kernel.org, slacky@cheapnet.it,
rggjan@gmail.com, gilboad@gmail.com,
Hayes Wang <hayeswang@realtek.com>
Subject: Re: [PATCH] 8139cp: set ring address after enabling C+ mode
Date: Thu, 22 Nov 2012 23:12:53 +0000 [thread overview]
Message-ID: <1353625973.26346.223.camel@shinybook.infradead.org> (raw)
In-Reply-To: <20121122213950.GA8873@electric-eye.fr.zoreil.com>
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On Thu, 2012-11-22 at 22:39 +0100, Francois Romieu wrote:
> Btw David W., could consider adding artificial delays between the
> writes and see if / when things start to fail (CpCmd write in
> cp_start_hw is an unflushed posted write for instance).
That's how I tracked it down to the CpCmd write. I littered the whole of
the init path with
printk("at line %d TxRingAddr %08x%08 (sb %08x)\n", __LINE__,
cpr32(TxRingAddr+4), cpr32(TxRingAddr), cp->ring_dma + whatever);
... until the output looked something like this:
root@geos:~# insmod ./8139cp.ko
[ 1331.492486] 8139cp: 8139cp: 10/100 PCI Ethernet driver v1.3 (Mar 22, 2004)
[ 1331.500388] 8139cp 0000:00:0a.0: eth0: RTL-8139Cx at 0xd10a6000, 00:0a:fa:22:
00:96, IRQ 10
[ 1331.509608] 8139cp 0000:00:0b.0: eth1: RTL-8139Cx at 0xd10a8100, 00:0a:fa:22:
00:97, IRQ 11
root@geos:~# [ 1331.644393] at line 995 TxRingAddr 000000000f3c6400 (sb f3c6400)
[ 1331.650579] at line 960 TxRingAddr 000000000f3c6400 (sb f3c6400)
[ 1331.656820] at line 962 TxRingAddr 000000000f3e4400 (sb f3c6400)
[ 1331.663020] at line 964 TxRingAddr 000000000f3e4400 (sb f3c6400)
[ 1331.669205] at line 998 TxRingAddr 000000000f3e4400 (sb f3c6400)
[ 1331.675412] at line 1001 TxRingAddr 000000000f3e4400 (sb f3c6400)
[ 1331.681706] at line 1003 TxRingAddr 000000000f3e4400 (sb f3c6400)
[ 1331.687977] at line 1005 TxRingAddr 000000000f3e4400 (sb f3c6400)
Each of those printks will have effectively flushed any prior posted
writes... not that this AMD Geode platform actually *does* post writes,
to my knowledge. And at 115200 baud, each one was about a 6ms delay.
--
dwmw2
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next prev parent reply other threads:[~2012-11-22 23:13 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20120602235020.2C0A57C006C@ra.kernel.org>
2012-11-21 16:57 ` 8139cp: set ring address before enabling receiver David Woodhouse
2012-11-21 18:12 ` Jeff Garzik
2012-11-21 19:51 ` David Woodhouse
2012-11-21 20:18 ` Ben Hutchings
2012-11-21 20:40 ` Jeff Garzik
2012-11-21 21:00 ` David Woodhouse
2012-11-21 21:10 ` Ben Hutchings
2012-11-21 20:27 ` [PATCH] 8139cp: set ring address after enabling C+ mode David Woodhouse
2012-11-21 20:40 ` Francois Romieu
2012-11-21 22:32 ` David Woodhouse
2012-11-21 22:40 ` David Miller
2012-11-21 22:52 ` David Woodhouse
2012-11-21 23:12 ` David Miller
2012-11-22 3:47 ` Jeff Garzik
2012-11-22 4:39 ` David Miller
2012-11-22 4:53 ` Jeff Garzik
2012-11-22 5:30 ` Jason Wang
2012-11-22 21:39 ` Francois Romieu
2012-11-22 23:12 ` David Woodhouse [this message]
2012-11-23 12:37 ` Gilboa Davara
2012-11-23 3:53 ` Jason Wang
2012-11-25 20:54 ` David Miller
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