From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
To: Richard Cochran <richardcochran@gmail.com>
Cc: netdev@vger.kernel.org, David Miller <davem@davemloft.net>,
e1000-devel@lists.sourceforge.net,
Jacob Keller <jacob.e.keller@intel.com>,
Matthew Vick <matthew.vick@intel.com>
Subject: Re: [PATCH net-next 3/4] igb: do not clobber the TSAUXC bits on reset.
Date: Mon, 27 May 2013 17:44:49 -0700 [thread overview]
Message-ID: <1369701889.2116.137.camel@jtkirshe-mobl> (raw)
In-Reply-To: <0c838f7cd866c88eb85bb8d2aaaef21048a7d0e9.1369645944.git.richardcochran@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 569 bytes --]
On Mon, 2013-05-27 at 11:21 +0200, Richard Cochran wrote:
> The TSAUXC register has a number of different bits, one of which
> disables
> the main clock function. Previously, the clock was re-enabled by
> clearing
> the entire register. This patch changes the code to preserve the
> values
> of the other bits in that register.
>
> Signed-off-by: Richard Cochran <richardcochran@gmail.com>
> ---
> drivers/net/ethernet/intel/igb/igb_ptp.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
Thanks Richard, I will add this to my queue.
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
next prev parent reply other threads:[~2013-05-28 0:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-27 9:21 [PATCH net-next 0/4] igb: auxiliary PHC functions for the i210 Richard Cochran
2013-05-27 9:21 ` [PATCH net-next 1/4] igb: refactor and simplify time sync interrupt handling Richard Cochran
2013-05-28 0:44 ` Jeff Kirsher
2013-05-28 15:24 ` Vick, Matthew
2013-05-27 9:21 ` [PATCH net-next 2/4] igb: add more register definitions for time sync functions Richard Cochran
2013-05-28 0:44 ` Jeff Kirsher
2013-05-27 9:21 ` [PATCH net-next 3/4] igb: do not clobber the TSAUXC bits on reset Richard Cochran
2013-05-28 0:44 ` Jeff Kirsher [this message]
2013-05-27 9:21 ` [PATCH net-next 4/4] igb: enable auxiliary PHC functions for the i210 Richard Cochran
2013-05-28 0:45 ` Jeff Kirsher
2013-05-28 15:58 ` Vick, Matthew
2013-05-28 16:23 ` Richard Cochran
2013-05-28 17:39 ` [E1000-devel] " Alexander Duyck
2013-05-28 17:49 ` Vick, Matthew
2013-05-28 21:12 ` Keller, Jacob E
2013-05-29 7:24 ` Richard Cochran
2013-05-29 7:34 ` David Miller
2013-05-29 20:32 ` Ben Hutchings
2013-05-28 15:58 ` [PATCH net-next 0/4] igb: " Vick, Matthew
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1369701889.2116.137.camel@jtkirshe-mobl \
--to=jeffrey.t.kirsher@intel.com \
--cc=davem@davemloft.net \
--cc=e1000-devel@lists.sourceforge.net \
--cc=jacob.e.keller@intel.com \
--cc=matthew.vick@intel.com \
--cc=netdev@vger.kernel.org \
--cc=richardcochran@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).