[PATCH net-next 0/2] net: phy: bcm7xxx: workaround updates

[PATCH net-next 0/2] net: phy: bcm7xxx: workaround updates

[Florian Fainelli]

Hi David,

This patchset contains two small workaround updates for the Broadcom
BCM7xxx internal PHY driver.

Thanks!

Florian Fainelli (2):
  net: phy: bcm7xxx: fix spurious MDIO failures during workaround
  net: phy: bcm7xxx: properly clear AFE_RX_LP_COUNTER

 drivers/net/phy/bcm7xxx.c | 31 ++++++++++++++++---------------
 1 file changed, 16 insertions(+), 15 deletions(-)

-- 
1.8.3.2

[PATCH net-next 1/2] net: phy: bcm7xxx: fix spurious MDIO failures during workaround

[Florian Fainelli]

Writing first to the AFE registers, and then the VCO, RCAL, RC_CAL
registers turned out to unveil some spurious MDIO read/write failures
which would make the workaround partially applied. The fix is to write
first to the VCO, RCAL, RC_CAL registers, and then write to the AFE
registers.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/net/phy/bcm7xxx.c | 31 ++++++++++++++++---------------
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 697337220016..07d719d6cc3c 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -87,21 +87,6 @@ static void phy_write_misc(struct phy_device *phydev,
 
 static int bcm7xxx_28nm_afe_config_init(struct phy_device *phydev)
 {
-	/* write AFE_RXCONFIG_0 */
-	phy_write_misc(phydev, 0x38, 0x0000, 0xeb19);
-
-	/* write AFE_RXCONFIG_1 */
-	phy_write_misc(phydev, 0x38, 0x0001, 0x9a3f);
-
-	/* write AFE_RX_LP_COUNTER */
-	phy_write_misc(phydev, 0x38, 0x0003, 0x7fc7);
-
-	/* write AFE_HPF_TRIM_OTHERS */
-	phy_write_misc(phydev, 0x3A, 0x0000, 0x000b);
-
-	/* write AFTE_TX_CONFIG */
-	phy_write_misc(phydev, 0x39, 0x0000, 0x0800);
-
 	/* Increase VCO range to prevent unlocking problem of PLL at low
 	 * temp
 	 */
@@ -127,6 +112,22 @@ static int bcm7xxx_28nm_afe_config_init(struct phy_device *phydev)
 	/* Disable Reset R_CAL/RC_CAL Engine */
 	phy_write_exp(phydev, 0x00b0, 0x0000);
 
+	/* write AFE_RXCONFIG_0 */
+	phy_write_misc(phydev, 0x38, 0x0000, 0xeb19);
+
+	/* write AFE_RXCONFIG_1 */
+	phy_write_misc(phydev, 0x38, 0x0001, 0x9a3f);
+
+	/* write AFE_RX_LP_COUNTER */
+	phy_write_misc(phydev, 0x38, 0x0003, 0x7fc7);
+
+	/* write AFE_HPF_TRIM_OTHERS */
+	phy_write_misc(phydev, 0x3A, 0x0000, 0x000b);
+
+	/* write AFTE_TX_CONFIG */
+	phy_write_misc(phydev, 0x39, 0x0000, 0x0800);
+
+
 	return 0;
 }
 
-- 
1.8.3.2

Re: [PATCH net-next 1/2] net: phy: bcm7xxx: fix spurious MDIO failures during workaround

[David Miller]

From: Florian Fainelli <f.fainelli@gmail.com>
Date: Fri, 14 Mar 2014 16:09:04 -0700

> @@ -87,21 +87,6 @@ static void phy_write_misc(struct phy_device *phydev,
>  
>  static int bcm7xxx_28nm_afe_config_init(struct phy_device *phydev)
>  {
> -	/* write AFE_RXCONFIG_0 */
> -	phy_write_misc(phydev, 0x38, 0x0000, 0xeb19);
> -
> -	/* write AFE_RXCONFIG_1 */
> -	phy_write_misc(phydev, 0x38, 0x0001, 0x9a3f);
> -
> -	/* write AFE_RX_LP_COUNTER */
> -	phy_write_misc(phydev, 0x38, 0x0003, 0x7fc7);
> -
> -	/* write AFE_HPF_TRIM_OTHERS */
> -	phy_write_misc(phydev, 0x3A, 0x0000, 0x000b);
> -
> -	/* write AFTE_TX_CONFIG */
> -	phy_write_misc(phydev, 0x39, 0x0000, 0x0800);
> -
 ...
> +	/* write AFE_RXCONFIG_0 */
> +	phy_write_misc(phydev, 0x38, 0x0000, 0xeb19);
> +
> +	/* write AFE_RXCONFIG_1 */
> +	phy_write_misc(phydev, 0x38, 0x0001, 0x9a3f);
> +
> +	/* write AFE_RX_LP_COUNTER */
> +	phy_write_misc(phydev, 0x38, 0x0003, 0x7fc7);
> +
> +	/* write AFE_HPF_TRIM_OTHERS */
> +	phy_write_misc(phydev, 0x3A, 0x0000, 0x000b);
> +
> +	/* write AFTE_TX_CONFIG */
> +	phy_write_misc(phydev, 0x39, 0x0000, 0x0800);
> +
> +
>  	return 0;
>  }
>  

If you can use mnenomics in the _comment_ you can certainly do so in
the code too.

I want defines added for the address and content of these registers.

Thanks.

[PATCH net-next 2/2] net: phy: bcm7xxx: properly clear AFE_RX_LP_COUNTER

[Florian Fainelli]

The AFE_RX_LP_COUNTER kept the last 3 bits set, which would not properly
clear the EEE LPI mode errors bits. Make sure that those bits are set to
0 to ensure the PHY timing is always good even during EEE wake-up.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/net/phy/bcm7xxx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 07d719d6cc3c..91a459c74f23 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -119,7 +119,7 @@ static int bcm7xxx_28nm_afe_config_init(struct phy_device *phydev)
 	phy_write_misc(phydev, 0x38, 0x0001, 0x9a3f);
 
 	/* write AFE_RX_LP_COUNTER */
-	phy_write_misc(phydev, 0x38, 0x0003, 0x7fc7);
+	phy_write_misc(phydev, 0x38, 0x0003, 0x7fc0);
 
 	/* write AFE_HPF_TRIM_OTHERS */
 	phy_write_misc(phydev, 0x3A, 0x0000, 0x000b);
-- 
1.8.3.2