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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2eb3927e526sm10442855ad.51.2026.10.30.10.06.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Oct 2026 10:06:52 -0700 (PDT) Message-ID: <13f102db-287d-4d5f-a113-c5614a3cb7bc@oss.qualcomm.com> Date: Fri, 30 Oct 2026 11:06:50 -0600 X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] accel/qaic: Add callbacks for DRM RAS netlink telemetry To: Zack McKevitt , dri-devel@lists.freedesktop.org, netdev@vger.kernel.org, riana.tauro@intel.com, aravind.iddamsetty@linux.intel.com, rodrigo.vivi@intel.com, raag.jadav@intel.com, simona.vetter@ffwll.ch, airlied@gmail.com, kuba@kernel.org, ogabbay@kernel.org, lizhi.hou@amd.com, karol.wachowski@linux.intel.com Cc: carl.vanderlip@oss.qualcomm.com, troy.hanson@oss.qualcomm.com, youssef.abdulrahman@oss.qualcomm.com References: <20261029203000.1763447-1-zachary.mckevitt@oss.qualcomm.com> <20261029203000.1763447-4-zachary.mckevitt@oss.qualcomm.com> Content-Language: en-US From: Jeff Hugo In-Reply-To: <20261029203000.1763447-4-zachary.mckevitt@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: UTUmv6P6259QBqBse4dCRDa3Wa7XEAOL X-Proofpoint-ORIG-GUID: UTUmv6P6259QBqBse4dCRDa3Wa7XEAOL X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMwMDA2OCBTYWx0ZWRfX3aLNF9mMMnKZ 3vqP1EMlmBJ7OnDrsldIfnRo0tL5B2HhpRbeUprq4ErnB5NBFESHOlV6PWFwPm5w0X/ENiRSSlw JvWOodx4cZTL2uivUI/UQXfIu1p2j6zGFh/8xE4epTWOlFeVqsd9bnJ3w1WHe38IQ1+xvb6Yc+Q PiuD6eFf0D3zYYwCfKHKR8snC1x/n76MaAbprXvGburAweS3Bfms9oXRBM/gWng5pLSjr/NceJM 0Ar0RcXE5121bQ8wDTSGMNU3fUbdMlRR5zbbVYwXnurIreMWZ8dhtJqh0zSrINbgrV0sZoR2+ao Vofkwj8DpbUBuFvEQd5ZB25smCocOiPYhG7wlymtGyj2BvRdj+E/kf/rh+RWQJlM4YOr/7ZU+/H EyG7sbZ5NxQimWN2Qr09u3ZmaL/TOocDfFiYE2f4iN0kXSslf325MCLGGWn+XJ2gxGPCILr38GI 9PKtNv0iFT0uW34FD2g== X-Authority-Analysis: v=2.4 cv=dPgzC+Zb c=1 sm=1 tr=0 ts=6ae4ceae cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=sY8SXE2aXj8CL1lXyIYA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMwMDA2OCBTYWx0ZWRfX+7dTmcKA4qSf MXsY7M/nsqlQdQfgg4EXcSXmv2VM2f9kW0gzJI6UBUrqf1Tc07amNdGkNfqyoJRUuKqE5FNzB7F l7SUk+59iS1yKDVjB/gJX5saTm189/M= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-30_05,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 spamscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 phishscore=0 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610300068 On 10/29/2026 2:30 PM, Zack McKevitt wrote: > @@ -611,6 +620,13 @@ static int qaic_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) > return ret; > } > > + ret = qaic_drm_ras_register_node(qdev); > + if (ret) { > + qaic_mhi_free_controller(qdev->mhi_cntrl, link_up); > + qaic_destroy_drm_device(qdev, QAIC_NO_PARTITION); > + return ret; > + } > + > return 0; > } Registering the mhi_controller will kickoff a whole init and boot sequence for the hardware. Feels like we should attempt this before that as if this fails, we don't leave the hardware in a weird state. > diff --git a/drivers/accel/qaic/qaic_telemetry.c b/drivers/accel/qaic/qaic_telemetry.c > new file mode 100644 > index 000000000000..fdce7a71d3eb > --- /dev/null > +++ b/drivers/accel/qaic/qaic_telemetry.c > @@ -0,0 +1,513 @@ > +// SPDX-License-Identifier: GPL-2.0-only > + > +/* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ > +/* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ > + > +#include > +#include > +#include A before D in the alphabet? > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "qaic.h" > +#include "qaic_telemetry.h" > + > +#define MAGIC 0x55AA > +#define VERSION 0x1 > + > +/* > + * Telemetry fields defined by the uAPI. > + * This table will be used by drm_ras's dumpit to display > + * each field to userspace. > + */ > +const struct drm_ras_telemetry_field qaic_telemetry_fields_gettable[] = { > + {"QAIC_DEVINFO_THERMAL_SOC_MAX_TEMP", 1}, > + {"QAIC_DEVINFO_THERMAL_BOARD_TEMP", 2}, > + {"QAIC_DEVINFO_THERMAL_BOARD_MAX_TEMP", 3}, > + {"QAIC_DEVINFO_THERMAL_DDR_TEMP", 4}, > + {"QAIC_DEVINFO_THERMAL_WARNING_TEMP", 5}, > + {"QAIC_DEVINFO_THERMAL_SHUTDOWN_TEMP", 6}, > + {"QAIC_DEVINFO_BOARD_TDP", 7}, > + {"QAIC_DEVINFO_BOARD_POWER", 8}, > + {"QAIC_DEVINFO_POWER_STATE", 9}, > + {"QAIC_DEVINFO_POWER_MAX", 10}, > + {"QAIC_DEVINFO_THROTTLE_PERCENT", 11}, > + {"QAIC_DEVINFO_THROTTLE_TIME", 12}, > + {"QAIC_DEVINFO_UPTIME", 13}, > + {"QAIC_DEVINFO_THERMAL_SOC_FLOOR_TEMP", 14}, > + {"QAIC_DEVINFO_THERMAL_SOC_CEILING_TEMP", 15}, > + {"QAIC_DEVINFO_VOLTAGE_CX", 16}, > + {"QAIC_DEVINFO_VOLTAGE_MX", 17}, > + {"QAIC_DEVINFO_VOLTAGE_NSP_CX", 18}, > + {"QAIC_DEVINFO_VOLTAGE_NSP_MX", 19}, > + {"QAIC_DEVINFO_CFG_TOPS", 20}, > + {"QAIC_DEVINFO_THERMAL_PMIC_TEMP_A", 21}, > + {"QAIC_DEVINFO_THERMAL_PMIC_TEMP_C", 22}, > + {"QAIC_DEVINFO_THERMAL_PMIC_TEMP_E", 23}, > + {"QAIC_DEVINFO_POWER_ACTION", 24}, > + {"QAIC_DEVINFO_SOC_TDP", 25}, > + {"QAIC_DEVINFO_SOC_POWER", 26}, This should be in sync with the defines in qaic_accel.h right? Can we just use those defines here?