From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
To: Richard Cochran <richardcochran@gmail.com>
Cc: netdev@vger.kernel.org, David Miller <davem@davemloft.net>,
bruce.w.allan@intel.com, Jacob Keller <jacob.e.keller@intel.com>,
John Ronciak <john.ronciak@intel.com>,
Matthew Vick <matthew.vick@intel.com>
Subject: Re: [PATCH net-next 0/4] igb: auxiliary PHC functions for the i210.
Date: Mon, 17 Nov 2014 15:15:18 -0800 [thread overview]
Message-ID: <1416266118.2983.3.camel@jtkirshe-mobl.jf.intel.com> (raw)
In-Reply-To: <cover.1416265321.git.richardcochran@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 890 bytes --]
On Tue, 2014-11-18 at 00:06 +0100, Richard Cochran wrote:
> This patch series adds three features: time stamping external events,
> producing a periodic output signal, and an internal PPS event. The
> i210 PCIe card has a 6 pin header with SDP0-3, making it easy to try
> out this new functionality.
>
> An earlier version of this series was posted way back in May, 2013,
> but that version lacked a good way to assign functions to the pins. In
> the mean time, the PHC core has a standard method to configure the
> pins, and this series makes use of it.
>
> Thanks,
> Richard
>
> Richard Cochran (4):
> igb: refactor time sync interrupt handling
> igb: do not clobber the TSAUXC bits on reset.
> igb: enable internal PPS for the i210.
> igb: enable auxiliary PHC functions for the i210.
Thanks Richard, I have added your series of igb patches to my queue.
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
next prev parent reply other threads:[~2014-11-17 23:15 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-17 23:06 [PATCH net-next 0/4] igb: auxiliary PHC functions for the i210 Richard Cochran
2014-11-17 23:06 ` [PATCH net-next 1/4] igb: refactor time sync interrupt handling Richard Cochran
2014-11-17 23:06 ` [PATCH net-next 2/4] igb: do not clobber the TSAUXC bits on reset Richard Cochran
2014-11-17 23:22 ` Keller, Jacob E
2014-11-17 23:06 ` [PATCH net-next 3/4] igb: enable internal PPS for the i210 Richard Cochran
2014-11-17 23:24 ` Keller, Jacob E
2014-11-19 6:37 ` Richard Cochran
2014-11-19 19:32 ` Keller, Jacob E
2014-11-19 20:26 ` Richard Cochran
2014-11-19 21:06 ` Keller, Jacob E
2014-11-20 9:18 ` Richard Cochran
2014-11-20 21:28 ` Keller, Jacob E
2014-11-21 5:49 ` Richard Cochran
2014-11-17 23:06 ` [PATCH net-next 4/4] igb: enable auxiliary PHC functions " Richard Cochran
2014-11-17 23:28 ` Keller, Jacob E
2014-11-17 23:15 ` Jeff Kirsher [this message]
2014-11-19 6:31 ` [PATCH net-next 0/4] igb: " Richard Cochran
2014-11-19 8:43 ` Jeff Kirsher
-- strict thread matches above, loose matches on Subject: below --
2013-05-27 9:21 Richard Cochran
2013-05-28 15:58 ` Vick, Matthew
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1416266118.2983.3.camel@jtkirshe-mobl.jf.intel.com \
--to=jeffrey.t.kirsher@intel.com \
--cc=bruce.w.allan@intel.com \
--cc=davem@davemloft.net \
--cc=jacob.e.keller@intel.com \
--cc=john.ronciak@intel.com \
--cc=matthew.vick@intel.com \
--cc=netdev@vger.kernel.org \
--cc=richardcochran@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).