From mboxrd@z Thu Jan 1 00:00:00 1970 From: Huacai Chen Subject: [PATCH 1/2] MIPS: Hibernate: flush TLB entries earlier Date: Mon, 22 Dec 2014 10:28:15 +0800 Message-ID: <1419215296-27831-1-git-send-email-chenhc@lemote.com> Cc: Srinivas Kandagatla , "David S. Miller" , netdev@vger.kernel.org, Huacai Chen , To: Giuseppe Cavallaro Return-path: Sender: stable-owner@vger.kernel.org List-Id: netdev.vger.kernel.org We found that TLB mismatch not only happens after kernel resume, but also happens during snapshot restore. So move it to the beginning of swsusp_arch_suspend(). Cc: Signed-off-by: Huacai Chen --- arch/mips/power/hibernate.S | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S index 32a7c82..e7567c8 100644 --- a/arch/mips/power/hibernate.S +++ b/arch/mips/power/hibernate.S @@ -30,6 +30,8 @@ LEAF(swsusp_arch_suspend) END(swsusp_arch_suspend) LEAF(swsusp_arch_resume) + /* Avoid TLB mismatch during and after kernel resume */ + jal local_flush_tlb_all PTR_L t0, restore_pblist 0: PTR_L t1, PBE_ADDRESS(t0) /* source */ @@ -43,7 +45,6 @@ LEAF(swsusp_arch_resume) bne t1, t3, 1b PTR_L t0, PBE_NEXT(t0) bnez t0, 0b - jal local_flush_tlb_all /* Avoid TLB mismatch after kernel resume */ PTR_LA t0, saved_regs PTR_L ra, PT_R31(t0) PTR_L sp, PT_R29(t0) -- 1.7.7.3