From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: [PATCH RFC 02/28] ARM: VF610: Add Zodiac Inflight Innovations development boards. Date: Wed, 23 Dec 2015 13:56:16 +0100 Message-ID: <1450875402-20740-3-git-send-email-andrew@lunn.ch> References: <1450875402-20740-1-git-send-email-andrew@lunn.ch> Cc: netdev , "Cory T. Tusar" , Andrew Lunn To: Florian Fainelli , narmstrong@baylibre.com, vivien.didelot@savoirfairelinux.com Return-path: Received: from vps0.lunn.ch ([178.209.37.122]:48706 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757125AbbLWM5m (ORCPT ); Wed, 23 Dec 2015 07:57:42 -0500 In-Reply-To: <1450875402-20740-1-git-send-email-andrew@lunn.ch> Sender: netdev-owner@vger.kernel.org List-ID: From: "Cory T. Tusar" "rev a" was the first generation of the board, had has some issues. Most of these issues are fixed in "Rev B". Put the common parts in a .dtsi file, and add .dts files for "Rev A" and "Rev B". Signed-off-by: Cory T. Tusar Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/Makefile | 4 +- arch/arm/boot/dts/vf610-zii-dev-rev-a.dts | 409 ++++++++++++++++++++++++++++ arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 287 ++++++++++++++++++++ arch/arm/boot/dts/vf610-zii-dev.dtsi | 436 ++++++++++++++++++++++++++++++ 4 files changed, 1135 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/vf610-zii-dev-rev-a.dts create mode 100644 arch/arm/boot/dts/vf610-zii-dev-rev-b.dts create mode 100644 arch/arm/boot/dts/vf610-zii-dev.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 30bbc3746130..f462036d4ff8 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -359,7 +359,9 @@ dtb-$(CONFIG_SOC_VF610) += \ vf610-colibri-eval-v3.dtb \ vf610m4-colibri.dtb \ vf610-cosmic.dtb \ - vf610-twr.dtb + vf610-twr.dtb \ + vf610-zii-dev-rev-a.dtb \ + vf610-zii-dev-rev-b.dtb dtb-$(CONFIG_ARCH_MXS) += \ imx23-evk.dtb \ imx23-olinuxino.dtb \ diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-a.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-a.dts new file mode 100644 index 000000000000..08bec6bd869a --- /dev/null +++ b/arch/arm/boot/dts/vf610-zii-dev-rev-a.dts @@ -0,0 +1,409 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; +#include "vf610-zii-dev.dtsi" + +/ { + model = "ZII VF610 Development Board, Rev A"; + compatible = "zii,vf610dev-a", "zii,vf610dev", "fsl,vf610"; + + chosen { + bootargs = "console=ttyLP0,115200n8"; + stdout-path = &uart0; + }; + + memory { + reg = <0x80000000 0x8000000>; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pinctrl_leds_debug>; + pinctrl-names = "default"; + + debug_1 { + label = "zii:green:debug1"; + gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; + }; + }; + + dsa@0 { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + + dsa,ethernet = <&fec1>; + dsa,mii-bus = <&mdio1>; + + /* 6352 - Primary - 7 ports */ + switch0: switch@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x02 0>; + eeprom-length = <512>; + + port@0 { + reg = <0>; + label = "lan0"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + + port@4 { + reg = <4>; + label = "lan4"; + }; + + switch0port5: port@5 { + reg = <5>; + label = "dsa"; + phy-mode = "rgmii-txid"; + link = <&switch1port6 + &switch2port9>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@6 { + reg = <6>; + label = "cpu"; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + + }; + + /* 6352 - Secondary - 7 ports */ + switch1: switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x04 1>; + eeprom-length = <512>; + + port@0 { + reg = <0>; + label = "lan5"; + }; + + port@1 { + reg = <1>; + label = "lan6"; + }; + + port@2 { + reg = <2>; + label = "lan7"; + }; + + port@3 { + reg = <3>; + label = "lan8"; + }; + + switch1port4: port@4 { + reg = <4>; + label = "dsa"; + link = <&switch2port9>; + }; + + switch1port6: port@6 { + reg = <6>; + label = "dsa"; + phy-mode = "rgmii-txid"; + link = <&switch0port5>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + /* 6185 - 10 ports */ + switch2: switch@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x06 2>; + + port@1 { + reg = <1>; + label = "optical3"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@2 { + reg = <2>; + label = "optical4"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + switch2port9: port@9 { + reg = <9>; + label = "dsa"; + link = <&switch1port4 + &switch0port5>; + }; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_mux_reset>; + + vf610-zii { + pinctrl_leds_debug: pinctrl-leds-debug { + fsl,pins = < + VF610_PAD_PTE13__GPIO_118 0x31c2 + >; + }; + + pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { + fsl,pins = < + VF610_PAD_PTE14__GPIO_119 0x31c2 + >; + }; + + pinctrl_adc0_ad5: adc0ad5grp { + fsl,pins = < + VF610_PAD_PTC30__ADC0_SE5 0xa1 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTA7__GPIO_134 0x219d + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + VF610_PAD_PTA6__RMII_CLKIN 0x30d1 + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 + >; + }; + + /* ------------------------------------------------------------- + * speed: high (200 MHz) + * slew rate: slow + * open drain: enabled + * hysteresis: Schmitt trigger + * drive strength: 20 Ohm + * pull strength: 22 kOhm pull-up + * pull / keeper: enabled + * pull / keeper select: pull + * output buffer: enabled + * input buffer: enabled + */ + pinctrl_i2c0: i2c0grp { + fsl,pins = < + VF610_PAD_PTB14__I2C0_SCL 0x37ff + VF610_PAD_PTB15__I2C0_SDA 0x37ff + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + VF610_PAD_PTB16__I2C1_SCL 0x37ff + VF610_PAD_PTB17__I2C1_SDA 0x37ff + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + VF610_PAD_PTA22__I2C2_SCL 0x37ff + VF610_PAD_PTA23__I2C2_SDA 0x37ff + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + VF610_PAD_PTA30__I2C3_SCL 0x37ff + VF610_PAD_PTA31__I2C3_SDA 0x37ff + >; + }; + + pinctrl_pwm0: pwm0grp { + fsl,pins = < + VF610_PAD_PTB0__FTM0_CH0 0x1582 + VF610_PAD_PTB1__FTM0_CH1 0x1582 + VF610_PAD_PTB2__FTM0_CH2 0x1582 + VF610_PAD_PTB3__FTM0_CH3 0x1582 + >; + }; + + pinctrl_uart0: uart0grp { + fsl,pins = < + VF610_PAD_PTB10__UART0_TX 0x21a2 + VF610_PAD_PTB11__UART0_RX 0x21a1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + VF610_PAD_PTB23__UART1_TX 0x21a2 + VF610_PAD_PTB24__UART1_RX 0x21a1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + VF610_PAD_PTD0__UART2_TX 0x21a2 + VF610_PAD_PTD1__UART2_RX 0x21a1 + >; + }; + + pinctrl_qspi0: qspi0grp { + fsl,pins = < + VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3 + VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff + VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3 + VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3 + VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3 + VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3 + >; + }; + + pinctrl_usb0_host: usb0-host-grp { + fsl,pins = < + VF610_PAD_PTD6__GPIO_85 0x62 + >; + }; + }; +}; + +&L2 { + arm,data-latency = <2 1 2>; + arm,tag-latency = <3 2 3>; +}; + +&pwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usbdev0 { + disable-over-current; + status = "okay"; + vbus-supply = <&usb0_vbus>; + dr_mode = "host"; +}; + +&usbh1 { + disable-over-current; + status = "okay"; +}; + +&usbmisc0 { + status = "okay"; +}; + +&usbmisc1 { + status = "okay"; +}; + +&usbphy0 { + status = "okay"; +}; + +&usbphy1 { + status = "okay"; +}; + +&qspi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi0>; + fsl,nor-size = <0x10000000>; + fsl,spi-num-chipselects = <2>; + status = "okay"; + + flash0: mt25ql02gc@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,mt25ql02gc"; + spi-max-frequency = <66000000>; + reg = <0>; + + partition@0 { + label = "mt25ql02gc-0-uboot"; + reg = <0x0 0x0100000>; + }; + + partition2@100000 { + label = "mt25ql02gc-0-dtb"; + reg = <0x0100000 0x0100000>; + }; + + partition3@200000 { + label = "mt25ql02gc-0-kernel"; + reg = <0x0200000 0x0500000>; + }; + + partition4@700000 { + label = "mt25ql02gc-0-rfs"; + reg = <0x0600000 0x8000000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts new file mode 100644 index 000000000000..6e657a9312ce --- /dev/null +++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts @@ -0,0 +1,287 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; +#include "vf610-zii-dev.dtsi" + +/ { + model = "ZII VF610 Development Board, Rev B"; + compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610"; + + chosen { + bootargs = "console=ttyLP0,115200n8"; + stdout-path = &uart0; + }; + + memory { + reg = <0x80000000 0x8000000>; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pinctrl_leds_debug>; + pinctrl-names = "default"; + + debug_1 { + label = "zii:green:debug1"; + gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; + }; + }; + + mdio-mux { + compatible = "mdio-mux-gpio"; + pinctrl-0 = <&pinctrl_mdio_mux>; + pinctrl-names = "default"; + gpios = <&gpio0 8 GPIO_ACTIVE_HIGH + &gpio0 9 GPIO_ACTIVE_HIGH + &gpio0 24 GPIO_ACTIVE_HIGH + &gpio0 25 GPIO_ACTIVE_HIGH>; + mdio-parent-bus = <&mdio1>; + #address-cells = <1>; + #size-cells = <0>; + + mdio_mux_1: mdio@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio_mux_2: mdio@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio_mux_4: mdio@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio_mux_8: mdio@8 { + reg = <8>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + dsa@0 { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + + dsa,ethernet = <&fec1>; + dsa,mii-bus = <&mdio_mux_1>; + + /* 6352 - Primary - 7 ports */ + switch0: switch@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x00 0>; + eeprom-length = <512>; + + port@0 { + reg = <0>; + label = "lan0"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + switch0port5: port@5 { + reg = <5>; + label = "dsa"; + phy-mode = "rgmii-txid"; + link = <&switch1port6 + &switch2port9>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@6 { + reg = <6>; + label = "cpu"; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + + }; + + /* 6352 - Secondary - 7 ports */ + switch1: switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x00 1>; + eeprom-length = <512>; + mii-bus = <&mdio_mux_2>; + + port@0 { + reg = <0>; + label = "lan3"; + }; + + port@1 { + reg = <1>; + label = "lan4"; + }; + + port@2 { + reg = <2>; + label = "lan5"; + }; + + switch1port5: port@5 { + reg = <5>; + label = "dsa"; + link = <&switch2port9>; + phy-mode = "rgmii-txid"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + switch1port6: port@6 { + reg = <6>; + label = "dsa"; + phy-mode = "rgmii-txid"; + link = <&switch0port5>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + /* 6185 - 10 ports */ + switch2: switch@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x00 2>; + mii-bus = <&mdio_mux_4>; + + port@0 { + reg = <0>; + label = "lan6"; + }; + + port@1 { + reg = <1>; + label = "lan7"; + }; + + port@2 { + reg = <2>; + label = "lan8"; + }; + + port@3 { + reg = <3>; + label = "optical3"; + fixed-link { + speed = <1000>; + full-duplex; + link-gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; + }; + }; + + port@4 { + reg = <4>; + label = "optical4"; + fixed-link { + speed = <1000>; + full-duplex; + link-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; + + }; + }; + + switch2port9: port@9 { + reg = <9>; + label = "dsa"; + phy-mode = "rgmii-txid"; + link = <&switch1port5 + &switch0port5>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_mux_reset>; + + vf610-zii { + pinctrl_mdio_mux: pinctrl-mdio-mux { + fsl,pins = < + VF610_PAD_PTA18__GPIO_8 0x31c2 + VF610_PAD_PTA19__GPIO_9 0x31c2 + VF610_PAD_PTB2__GPIO_24 0x31c2 + VF610_PAD_PTB3__GPIO_25 0x31c2 + >; + }; + pinctrl_fec0: fec0grp { + fsl,pins = < + VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d2 + VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3 + VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1 + VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1 + VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1 + VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1 + VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2 + VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2 + VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2 + >; + }; + + pinctrl_leds_debug: pinctrl-leds-debug { + fsl,pins = < + VF610_PAD_PTD20__GPIO_74 0x31c2 + >; + }; + pinctrl_pca9554_opt: pinctrl-pca95540-opt { + fsl,pins = < + VF610_PAD_PTB18__GPIO_40 0x219d + >; + }; + }; +}; + +&fec0 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec0>; + status = "okay"; +}; + +&i2c0 { + gpio6: pca9505@20 { + compatible = "nxp,pca9554"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pca9554_opt>; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + }; +}; diff --git a/arch/arm/boot/dts/vf610-zii-dev.dtsi b/arch/arm/boot/dts/vf610-zii-dev.dtsi new file mode 100644 index 000000000000..9ff7abbbb36e --- /dev/null +++ b/arch/arm/boot/dts/vf610-zii-dev.dtsi @@ -0,0 +1,436 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include "vf610.dtsi" + +/ { + audio_ext: mclk-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; + + enet_ext: eth-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_3p3v: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vcc_3v3_mcu: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "vcc_3v3_mcu"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + usb0_vbus: regulator@2 { + compatible = "regulator-fixed"; + pinctrl-0 = <&pinctrl_usb_vbus>; + reg = <2>; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 6 0>; + }; + }; +}; + +&adc0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc0_ad5>; + vref-supply = <®_vcc_3v3_mcu>; + status = "okay"; +}; + +&edma0 { + status = "okay"; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + bus-width = <4>; + status = "okay"; +}; + +&fec1 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + status = "okay"; + + fixed-link { + speed = <100>; + full-duplex; + }; + + mdio1: mdio { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; +}; + +&i2c0 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + status = "okay"; + + gpio5: pca9505@20 { + compatible = "nxp,pca9554"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + lm75@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + + at24c04@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + }; + + at24c04@52 { + compatible = "atmel,24c04"; + reg = <0x52>; + }; + + ds1682@6b { + compatible = "dallas,ds1682"; + reg = <0x6b>; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + tca9548@70 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + + i2c2_0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + sfp1: at24c04@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + }; + + i2c2_1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + sfp2: at24c04@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + }; + + i2c2_2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + sfp3: at24c04@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + }; + + i2c2_3: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + sfp4: at24c04@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + }; + + i2c2_4: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_mux_reset>; + + vf610-zii { + pinctrl_usb_vbus: pinctrl-usb-vbus { + fsl,pins = < + VF610_PAD_PTA16__GPIO_6 0x31c2 + >; + }; + + pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { + fsl,pins = < + VF610_PAD_PTE14__GPIO_119 0x31c2 + >; + }; + + pinctrl_adc0_ad5: adc0ad5grp { + fsl,pins = < + VF610_PAD_PTC30__ADC0_SE5 0xa1 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTA7__GPIO_134 0x219d + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + VF610_PAD_PTA6__RMII_CLKIN 0x30d1 + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 + >; + }; + + /* ------------------------------------------------------------- + * speed: high (200 MHz) + * slew rate: slow + * open drain: enabled + * hysteresis: Schmitt trigger + * drive strength: 20 Ohm + * pull strength: 22 kOhm pull-up + * pull / keeper: enabled + * pull / keeper select: pull + * output buffer: enabled + * input buffer: enabled + */ + pinctrl_i2c0: i2c0grp { + fsl,pins = < + VF610_PAD_PTB14__I2C0_SCL 0x37ff + VF610_PAD_PTB15__I2C0_SDA 0x37ff + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + VF610_PAD_PTB16__I2C1_SCL 0x37ff + VF610_PAD_PTB17__I2C1_SDA 0x37ff + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + VF610_PAD_PTA22__I2C2_SCL 0x37ff + VF610_PAD_PTA23__I2C2_SDA 0x37ff + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + VF610_PAD_PTA30__I2C3_SCL 0x37ff + VF610_PAD_PTA31__I2C3_SDA 0x37ff + >; + }; + + pinctrl_pwm0: pwm0grp { + fsl,pins = < + VF610_PAD_PTB0__FTM0_CH0 0x1582 + VF610_PAD_PTB1__FTM0_CH1 0x1582 + VF610_PAD_PTB2__FTM0_CH2 0x1582 + VF610_PAD_PTB3__FTM0_CH3 0x1582 + >; + }; + + pinctrl_uart0: uart0grp { + fsl,pins = < + VF610_PAD_PTB10__UART0_TX 0x21a2 + VF610_PAD_PTB11__UART0_RX 0x21a1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + VF610_PAD_PTB23__UART1_TX 0x21a2 + VF610_PAD_PTB24__UART1_RX 0x21a1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + VF610_PAD_PTD0__UART2_TX 0x21a2 + VF610_PAD_PTD1__UART2_RX 0x21a1 + >; + }; + + pinctrl_qspi0: qspi0grp { + fsl,pins = < + VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3 + VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff + VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3 + VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3 + VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3 + VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3 + >; + }; + + pinctrl_usb0_host: usb0-host-grp { + fsl,pins = < + VF610_PAD_PTD6__GPIO_85 0x62 + >; + }; + }; +}; + +&L2 { + arm,data-latency = <2 1 2>; + arm,tag-latency = <3 2 3>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usbdev0 { + disable-over-current; + status = "okay"; + vbus-supply = <&usb0_vbus>; + dr_mode = "host"; +}; + +&usbh1 { + disable-over-current; + status = "okay"; +}; + +&usbmisc0 { + status = "okay"; +}; + +&usbmisc1 { + status = "okay"; +}; + +&usbphy0 { + status = "okay"; +}; + +&usbphy1 { + status = "okay"; +}; + +&qspi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi0>; + fsl,nor-size = <0x10000000>; + fsl,spi-num-chipselects = <2>; + status = "okay"; + + flash0: mt25ql02gc@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,mt25ql02gc"; + spi-max-frequency = <66000000>; + reg = <0>; + + partition@0 { + label = "mt25ql02gc-0-uboot"; + reg = <0x0 0x0100000>; + }; + + partition2@100000 { + label = "mt25ql02gc-0-dtb"; + reg = <0x0100000 0x0100000>; + }; + + partition3@200000 { + label = "mt25ql02gc-0-kernel"; + reg = <0x0200000 0x0500000>; + }; + + partition4@700000 { + label = "mt25ql02gc-0-rfs"; + reg = <0x0600000 0x8000000>; + }; + }; +}; -- 2.6.3