From: "Christopher S. Hall" <christopher.s.hall@intel.com>
To: tglx@linutronix.de, richardcochran@gmail.com, mingo@redhat.com,
john.stultz@linaro.org, hpa@zytor.com,
jeffrey.t.kirsher@intel.com
Cc: "Christopher S. Hall" <christopher.s.hall@intel.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
kevin.b.stanton@intel.com
Subject: [RFC v5 2/6] Always Running Timer (ART) correlated clocksource
Date: Mon, 4 Jan 2016 04:45:19 -0800 [thread overview]
Message-ID: <1451911523-8534-3-git-send-email-christopher.s.hall@intel.com> (raw)
In-Reply-To: <1451911523-8534-1-git-send-email-christopher.s.hall@intel.com>
On modern Intel systems TSC is derived from the new Always Running Timer
(ART). ART can be captured simultaneous to the capture of
audio and network device clocks, allowing a correlation between timebases
to be constructed. Upon capture, the driver converts the captured ART
value to the appropriate system clock using the correlated clocksource
mechanism.
On systems that support ART a new CPUID leaf (0x15) returns parameters
“m” and “n” such that:
TSC_value = (ART_value * m) / n + k [n >= 2]
[k is an offset that can adjusted by a privileged agent. The
IA32_TSC_ADJUST MSR is an example of an interface to adjust k.
See 17.14.4 of the Intel SDM for more details]
Signed-off-by: Christopher S. Hall <christopher.s.hall@intel.com>
---
arch/x86/include/asm/cpufeature.h | 2 +-
arch/x86/include/asm/tsc.h | 2 ++
arch/x86/kernel/tsc.c | 46 +++++++++++++++++++++++++++++++++++++++
3 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index e4f8010..58c799e 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -85,7 +85,7 @@
#define X86_FEATURE_P4 ( 3*32+ 7) /* "" P4 */
#define X86_FEATURE_CONSTANT_TSC ( 3*32+ 8) /* TSC ticks at a constant rate */
#define X86_FEATURE_UP ( 3*32+ 9) /* smp kernel running on up */
-/* free, was #define X86_FEATURE_FXSAVE_LEAK ( 3*32+10) * "" FXSAVE leaks FOP/FIP/FOP */
+#define X86_FEATURE_ART (3*32+10) /* Platform has always running timer (ART) */
#define X86_FEATURE_ARCH_PERFMON ( 3*32+11) /* Intel Architectural PerfMon */
#define X86_FEATURE_PEBS ( 3*32+12) /* Precise-Event Based Sampling */
#define X86_FEATURE_BTS ( 3*32+13) /* Branch Trace Store */
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 6d7c547..9474c9c 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -29,6 +29,8 @@ static inline cycles_t get_cycles(void)
return rdtsc();
}
+extern struct correlated_cs art_timestamper;
+
extern void tsc_init(void);
extern void mark_tsc_unstable(char *reason);
extern int unsynchronized_tsc(void);
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index c7c4d9c..26dcf63 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -949,10 +949,36 @@ static struct notifier_block time_cpufreq_notifier_block = {
.notifier_call = time_cpufreq_notifier
};
+#define ART_CPUID_LEAF (0x15)
+/* The denominator will never be less that 2 */
+#define ART_MIN_DENOMINATOR (2)
+
+static u32 art_to_tsc_numerator;
+static u32 art_to_tsc_denominator;
+
+/*
+ * If ART is present detect the numerator:denominator to convert to TSC
+ */
+static void detect_art(void)
+{
+ unsigned int unused[2];
+
+ if (boot_cpu_data.cpuid_level >= ART_CPUID_LEAF) {
+ cpuid(ART_CPUID_LEAF, &art_to_tsc_denominator,
+ &art_to_tsc_numerator, unused, unused+1);
+
+ if (art_to_tsc_denominator >= ART_MIN_DENOMINATOR)
+ set_cpu_cap(&boot_cpu_data, X86_FEATURE_ART);
+ }
+}
+
static int __init cpufreq_tsc(void)
{
if (!cpu_has_tsc)
return 0;
+
+ detect_art();
+
if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
return 0;
cpufreq_register_notifier(&time_cpufreq_notifier_block,
@@ -1071,6 +1097,24 @@ int unsynchronized_tsc(void)
return 0;
}
+/*
+ * Convert ART to TSC given numerator/denominator found in detect_art()
+ */
+static u64 convert_art_to_tsc(struct correlated_cs *cs, u64 cycles)
+{
+ u64 tmp, res;
+
+ res = (cycles / art_to_tsc_denominator) * art_to_tsc_numerator;
+ tmp = (cycles % art_to_tsc_denominator) * art_to_tsc_numerator;
+ res += tmp / art_to_tsc_denominator;
+
+ return res;
+}
+
+struct correlated_cs art_timestamper = {
+ .convert = convert_art_to_tsc,
+};
+EXPORT_SYMBOL(art_timestamper);
static void tsc_refine_calibration_work(struct work_struct *work);
static DECLARE_DELAYED_WORK(tsc_irqwork, tsc_refine_calibration_work);
@@ -1142,6 +1186,8 @@ static void tsc_refine_calibration_work(struct work_struct *work)
(unsigned long)tsc_khz % 1000);
out:
+ if (boot_cpu_has(X86_FEATURE_ART))
+ art_timestamper.related_cs = &clocksource_tsc;
clocksource_register_khz(&clocksource_tsc, tsc_khz);
}
--
2.1.4
next prev parent reply other threads:[~2016-01-04 12:45 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-04 12:45 [RFC v5 0/6] Patchset enabling hardware based cross-timestamps for next gen Intel platforms Christopher S. Hall
2016-01-04 12:45 ` [RFC v5 1/6] Timekeeping cross timestamp interface for device drivers Christopher S. Hall
2016-01-06 18:55 ` John Stultz
2016-01-08 0:42 ` Christopher Hall
2016-01-08 1:05 ` John Stultz
2016-01-08 9:13 ` Richard Cochran
2016-01-04 12:45 ` Christopher S. Hall [this message]
2016-01-04 12:45 ` [RFC v5 3/6] Add history to cross timestamp interface supporting slower devices Christopher S. Hall
2016-01-06 19:37 ` John Stultz
2016-01-08 1:07 ` Christopher Hall
2016-01-08 1:12 ` John Stultz
2016-01-08 14:04 ` Thomas Gleixner
2016-01-08 22:28 ` Christopher Hall
2016-01-04 12:45 ` [RFC v5 4/6] Remove duplicate code from ktime_get_raw_and_real code Christopher S. Hall
2016-01-06 19:42 ` John Stultz
2016-01-04 12:45 ` [RFC v5 5/6] Add PTP_SYS_OFFSET_PRECISE for driver crosstimestamping Christopher S. Hall
2016-01-05 15:27 ` Richard Cochran
2016-01-07 1:42 ` Christopher Hall
2016-01-04 12:45 ` [RFC v5 6/6] Adds hardware supported cross timestamp Christopher S. Hall
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