From: Jiri Pirko <jiri@resnulli.us>
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, idosch@mellanox.com, eladr@mellanox.com,
yotamg@mellanox.com, ogerlitz@mellanox.com
Subject: [patch net 11/11] mlxsw: reg: Use correct offset in field definiton
Date: Wed, 27 Jan 2016 15:20:26 +0100 [thread overview]
Message-ID: <1453904426-4960-12-git-send-email-jiri@resnulli.us> (raw)
In-Reply-To: <1453904426-4960-1-git-send-email-jiri@resnulli.us>
From: Ido Schimmel <idosch@mellanox.com>
The rx_lane, tx_lane and module fields in the PMLP register don't have
an additional offset besides the base one (0x04), so set it to 0x00.
Fixes: 4ec14b7634b2 ("mlxsw: Add interface to access registers and process events")
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 815e5df..bb77e22 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -1787,20 +1787,20 @@ MLXSW_ITEM32(reg, pmlp, width, 0x00, 0, 8);
* Module number.
* Access: RW
*/
-MLXSW_ITEM32_INDEXED(reg, pmlp, module, 0x04, 0, 8, 0x04, 0, false);
+MLXSW_ITEM32_INDEXED(reg, pmlp, module, 0x04, 0, 8, 0x04, 0x00, false);
/* reg_pmlp_tx_lane
* Tx Lane. When rxtx field is cleared, this field is used for Rx as well.
* Access: RW
*/
-MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 2, 0x04, 16, false);
+MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 2, 0x04, 0x00, false);
/* reg_pmlp_rx_lane
* Rx Lane. When rxtx field is cleared, this field is ignored and Rx lane is
* equal to Tx lane.
* Access: RW
*/
-MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 2, 0x04, 24, false);
+MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 2, 0x04, 0x00, false);
static inline void mlxsw_reg_pmlp_pack(char *payload, u8 local_port)
{
--
1.9.3
next prev parent reply other threads:[~2016-01-27 14:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-27 14:20 [patch net 00/11] mlxsw: driver fixes Jiri Pirko
2016-01-27 14:20 ` [patch net 01/11] mlxsw: spectrum: Handle port leaving LAG while bridged Jiri Pirko
2016-01-27 14:20 ` [patch net 02/11] mlxsw: reg: Add the Switch Filtering DB Flush register Jiri Pirko
2016-01-27 14:20 ` [patch net 03/11] mlxsw: spectrum: Flush FDB when leaving bridge Jiri Pirko
2016-01-27 14:20 ` [patch net 04/11] mlxsw: spectrum: Don't forward packets when STP state is DISABLED Jiri Pirko
2016-01-27 14:20 ` [patch net 05/11] mlxsw: spectrum: Disable learning according to STP state Jiri Pirko
2016-01-27 14:20 ` [patch net 06/11] mlxsw: spectrum: Notify bridge's FDB only based on learning_sync Jiri Pirko
2016-01-27 14:20 ` [patch net 07/11] mlxsw: spectrum: Don't report VLAN for 802.1D FDB entries Jiri Pirko
2016-01-27 14:20 ` [patch net 08/11] mlxsw: spectrum: Use correct netdev when notifying bridge Jiri Pirko
2016-01-27 14:20 ` [patch net 09/11] mlxsw: spectrum: Dump LAG FDB records only once Jiri Pirko
2016-01-27 14:20 ` [patch net 10/11] mlxsw: spectrum: Compare local ports instead of pointers Jiri Pirko
2016-01-27 14:20 ` Jiri Pirko [this message]
2016-01-28 23:57 ` [patch net 00/11] mlxsw: driver fixes David Miller
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