From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jiri Pirko Subject: [patch net-next 03/14] mlxsw: reg: Add Router Algorithmic LPM Structure Tree Register definition Date: Mon, 4 Jul 2016 08:23:06 +0200 Message-ID: <1467613397-17140-4-git-send-email-jiri@resnulli.us> References: <1467613397-17140-1-git-send-email-jiri@resnulli.us> Cc: davem@davemloft.net, idosch@mellanox.com, yotamg@mellanox.com, eladr@mellanox.com, nogahf@mellanox.com, ogerlitz@mellanox.com, sfeldma@gmail.com, roopa@cumulusnetworks.com, andy@greyhouse.net, dsa@cumulusnetworks.com, tgraf@suug.ch, jhs@mojatatu.com, linville@tuxdriver.com, ivecera@redhat.com To: netdev@vger.kernel.org Return-path: Received: from mail-wm0-f68.google.com ([74.125.82.68]:33326 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753050AbcGDGXY (ORCPT ); Mon, 4 Jul 2016 02:23:24 -0400 Received: by mail-wm0-f68.google.com with SMTP id r201so19140867wme.0 for ; Sun, 03 Jul 2016 23:23:23 -0700 (PDT) In-Reply-To: <1467613397-17140-1-git-send-email-jiri@resnulli.us> Sender: netdev-owner@vger.kernel.org List-ID: From: Jiri Pirko Serves to build LPM tree structure. Signed-off-by: Jiri Pirko Reviewed-by: Ido Schimmel --- drivers/net/ethernet/mellanox/mlxsw/reg.h | 77 +++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index a358e1b..4ea608f 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -3504,6 +3504,81 @@ static inline void mlxsw_reg_ralta_pack(char *payload, bool alloc, mlxsw_reg_ralta_tree_id_set(payload, tree_id); } +/* RALST - Router Algorithmic LPM Structure Tree Register + * ------------------------------------------------------ + * RALST is used to set and query the structure of an LPM tree. + * The structure of the tree must be sorted as a sorted binary tree, while + * each node is a bin that is tagged as the length of the prefixes the lookup + * will refer to. Therefore, bin X refers to a set of entries with prefixes + * of X bits to match with the destination address. The bin 0 indicates + * the default action, when there is no match of any prefix. + */ +#define MLXSW_REG_RALST_ID 0x8011 +#define MLXSW_REG_RALST_LEN 0x104 + +static const struct mlxsw_reg_info mlxsw_reg_ralst = { + .id = MLXSW_REG_RALST_ID, + .len = MLXSW_REG_RALST_LEN, +}; + +/* reg_ralst_root_bin + * The bin number of the root bin. + * 0