* [PATCH 0/2] Broadcom BCM54612E support
@ 2016-10-21 17:20 Xo Wang
2016-10-21 17:20 ` [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Xo Wang
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Xo Wang @ 2016-10-21 17:20 UTC (permalink / raw)
To: f.fainelli; +Cc: davem, jaedon.shin, netdev, linux-kernel, openbmc, joel
This series is based on tip of torvalds/master.
The first patch adds register definitions from Broadcom docs.
The second patch adds the BCM54612E PHY ID, flags, and device-specific
RGMII internal delay initialization.
I tested on a custom board with an Aspeed AST2500 SOC with its second
MAC connected to this PHY.
Xo Wang (2):
net: phy: broadcom: Update Auxiliary Control Register
net: phy: broadcom: Add support for BCM54612E
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros 2016-10-21 17:20 [PATCH 0/2] Broadcom BCM54612E support Xo Wang @ 2016-10-21 17:20 ` Xo Wang 2016-10-21 21:27 ` Florian Fainelli 2016-10-22 0:41 ` Joel Stanley 2016-10-21 17:20 ` [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E Xo Wang 2016-10-26 21:16 ` [PATCH 0/2] Broadcom BCM54612E support David Miller 2 siblings, 2 replies; 8+ messages in thread From: Xo Wang @ 2016-10-21 17:20 UTC (permalink / raw) To: f.fainelli Cc: davem, jaedon.shin, netdev, linux-kernel, openbmc, joel, Xo Wang Add the RXD-to-RXC skew (delay) time bit in the Miscellaneous Control shadow register and a mask for the shadow selector field. Remove a re-definition of MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL. Signed-off-by: Xo Wang <xow@google.com> --- include/linux/brcmphy.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h index e3354b7..22c4421 100644 --- a/include/linux/brcmphy.h +++ b/include/linux/brcmphy.h @@ -105,11 +105,12 @@ #define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800 #define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000 +#define MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW 0x0100 #define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 #define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 -#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 +#define MII_BCM54XX_AUXCTL_SHDWSEL_MASK 0x0007 /* * Broadcom LED source encodings. These are used in BCM5461, BCM5481, -- 2.8.0.rc3.226.g39d4020 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros 2016-10-21 17:20 ` [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Xo Wang @ 2016-10-21 21:27 ` Florian Fainelli 2016-10-22 0:41 ` Joel Stanley 1 sibling, 0 replies; 8+ messages in thread From: Florian Fainelli @ 2016-10-21 21:27 UTC (permalink / raw) To: Xo Wang; +Cc: davem, jaedon.shin, netdev, linux-kernel, openbmc, joel On 10/21/2016 10:20 AM, Xo Wang wrote: > Add the RXD-to-RXC skew (delay) time bit in the Miscellaneous Control > shadow register and a mask for the shadow selector field. > > Remove a re-definition of MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL. > > Signed-off-by: Xo Wang <xow@google.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -- Florian ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros 2016-10-21 17:20 ` [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Xo Wang 2016-10-21 21:27 ` Florian Fainelli @ 2016-10-22 0:41 ` Joel Stanley 1 sibling, 0 replies; 8+ messages in thread From: Joel Stanley @ 2016-10-22 0:41 UTC (permalink / raw) To: Xo Wang Cc: Florian Fainelli, davem, jaedon.shin, netdev, linux-kernel, OpenBMC Maillist On Sat, Oct 22, 2016 at 3:50 AM, Xo Wang <xow@google.com> wrote: > Add the RXD-to-RXC skew (delay) time bit in the Miscellaneous Control > shadow register and a mask for the shadow selector field. > > Remove a re-definition of MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL. > > Signed-off-by: Xo Wang <xow@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Cheers, Joel > --- > include/linux/brcmphy.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E 2016-10-21 17:20 [PATCH 0/2] Broadcom BCM54612E support Xo Wang 2016-10-21 17:20 ` [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Xo Wang @ 2016-10-21 17:20 ` Xo Wang 2016-10-21 21:31 ` Florian Fainelli 2016-10-22 0:40 ` Joel Stanley 2016-10-26 21:16 ` [PATCH 0/2] Broadcom BCM54612E support David Miller 2 siblings, 2 replies; 8+ messages in thread From: Xo Wang @ 2016-10-21 17:20 UTC (permalink / raw) To: f.fainelli Cc: davem, jaedon.shin, netdev, linux-kernel, openbmc, joel, Xo Wang This PHY has internal delays enabled after reset. This clears the internal delay enables unless the interface specifically requests them. Signed-off-by: Xo Wang <xow@google.com> --- drivers/net/phy/broadcom.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++ include/linux/brcmphy.h | 1 + 2 files changed, 49 insertions(+) diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 870327e..583ef8a 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -337,6 +337,41 @@ static int bcm5481_config_aneg(struct phy_device *phydev) return ret; } +static int bcm54612e_config_aneg(struct phy_device *phydev) +{ + int ret; + + /* First, auto-negotiate. */ + ret = genphy_config_aneg(phydev); + + /* Clear TX internal delay unless requested. */ + if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) && + (phydev->interface != PHY_INTERFACE_MODE_RGMII_TXID)) { + /* Disable TXD to GTXCLK clock delay (default set) */ + /* Bit 9 is the only field in shadow register 00011 */ + bcm_phy_write_shadow(phydev, 0x03, 0); + } + + /* Clear RX internal delay unless requested. */ + if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) && + (phydev->interface != PHY_INTERFACE_MODE_RGMII_RXID)) { + u16 reg; + + /* Errata: reads require filling in the write selector field */ + bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, + MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC); + reg = phy_read(phydev, MII_BCM54XX_AUX_CTL); + /* Disable RXD to RXC delay (default set) */ + reg &= ~MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW; + /* Clear shadow selector field */ + reg &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MASK; + bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, + MII_BCM54XX_AUXCTL_MISC_WREN | reg); + } + + return ret; +} + static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set) { int val; @@ -485,6 +520,18 @@ static struct phy_driver broadcom_drivers[] = { .ack_interrupt = bcm_phy_ack_intr, .config_intr = bcm_phy_config_intr, }, { + .phy_id = PHY_ID_BCM54612E, + .phy_id_mask = 0xfffffff0, + .name = "Broadcom BCM54612E", + .features = PHY_GBIT_FEATURES | + SUPPORTED_Pause | SUPPORTED_Asym_Pause, + .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, + .config_init = bcm54xx_config_init, + .config_aneg = bcm54612e_config_aneg, + .read_status = genphy_read_status, + .ack_interrupt = bcm_phy_ack_intr, + .config_intr = bcm_phy_config_intr, +}, { .phy_id = PHY_ID_BCM54616S, .phy_id_mask = 0xfffffff0, .name = "Broadcom BCM54616S", @@ -600,6 +647,7 @@ static struct mdio_device_id __maybe_unused broadcom_tbl[] = { { PHY_ID_BCM5411, 0xfffffff0 }, { PHY_ID_BCM5421, 0xfffffff0 }, { PHY_ID_BCM5461, 0xfffffff0 }, + { PHY_ID_BCM54612E, 0xfffffff0 }, { PHY_ID_BCM54616S, 0xfffffff0 }, { PHY_ID_BCM5464, 0xfffffff0 }, { PHY_ID_BCM5481, 0xfffffff0 }, diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h index 22c4421..60def78 100644 --- a/include/linux/brcmphy.h +++ b/include/linux/brcmphy.h @@ -18,6 +18,7 @@ #define PHY_ID_BCM5421 0x002060e0 #define PHY_ID_BCM5464 0x002060b0 #define PHY_ID_BCM5461 0x002060c0 +#define PHY_ID_BCM54612E 0x03625e60 #define PHY_ID_BCM54616S 0x03625d10 #define PHY_ID_BCM57780 0x03625d90 -- 2.8.0.rc3.226.g39d4020 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E 2016-10-21 17:20 ` [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E Xo Wang @ 2016-10-21 21:31 ` Florian Fainelli 2016-10-22 0:40 ` Joel Stanley 1 sibling, 0 replies; 8+ messages in thread From: Florian Fainelli @ 2016-10-21 21:31 UTC (permalink / raw) To: Xo Wang; +Cc: davem, jaedon.shin, netdev, linux-kernel, openbmc, joel On 10/21/2016 10:20 AM, Xo Wang wrote: > This PHY has internal delays enabled after reset. This clears the > internal delay enables unless the interface specifically requests them. > > Signed-off-by: Xo Wang <xow@google.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cross checked with the datasheet, this all looks correct to me, thanks! -- Florian ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E 2016-10-21 17:20 ` [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E Xo Wang 2016-10-21 21:31 ` Florian Fainelli @ 2016-10-22 0:40 ` Joel Stanley 1 sibling, 0 replies; 8+ messages in thread From: Joel Stanley @ 2016-10-22 0:40 UTC (permalink / raw) To: Xo Wang Cc: Florian Fainelli, davem, jaedon.shin, netdev, linux-kernel, OpenBMC Maillist On Sat, Oct 22, 2016 at 3:50 AM, Xo Wang <xow@google.com> wrote: > This PHY has internal delays enabled after reset. This clears the > internal delay enables unless the interface specifically requests them. > > Signed-off-by: Xo Wang <xow@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Cheers, Joel > --- > drivers/net/phy/broadcom.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++ > include/linux/brcmphy.h | 1 + > 2 files changed, 49 insertions(+) ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/2] Broadcom BCM54612E support 2016-10-21 17:20 [PATCH 0/2] Broadcom BCM54612E support Xo Wang 2016-10-21 17:20 ` [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Xo Wang 2016-10-21 17:20 ` [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E Xo Wang @ 2016-10-26 21:16 ` David Miller 2 siblings, 0 replies; 8+ messages in thread From: David Miller @ 2016-10-26 21:16 UTC (permalink / raw) To: xow; +Cc: f.fainelli, jaedon.shin, netdev, linux-kernel, openbmc, joel From: Xo Wang <xow@google.com> Date: Fri, 21 Oct 2016 10:20:11 -0700 > This series is based on tip of torvalds/master. > > The first patch adds register definitions from Broadcom docs. > > The second patch adds the BCM54612E PHY ID, flags, and device-specific > RGMII internal delay initialization. > > I tested on a custom board with an Aspeed AST2500 SOC with its second > MAC connected to this PHY. Series applied to net-next, thanks. ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2016-10-26 21:16 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-10-21 17:20 [PATCH 0/2] Broadcom BCM54612E support Xo Wang 2016-10-21 17:20 ` [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Xo Wang 2016-10-21 21:27 ` Florian Fainelli 2016-10-22 0:41 ` Joel Stanley 2016-10-21 17:20 ` [PATCH 2/2] net: phy: broadcom: Add support for BCM54612E Xo Wang 2016-10-21 21:31 ` Florian Fainelli 2016-10-22 0:40 ` Joel Stanley 2016-10-26 21:16 ` [PATCH 0/2] Broadcom BCM54612E support David Miller
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