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From: Andrew Lunn <andrew@lunn.ch>
To: David Miller <davem@davemloft.net>
Cc: netdev <netdev@vger.kernel.org>,
	Vivien Didelot <vivien.didelot@savoirfairelinux.com>,
	Andrew Lunn <andrew@lunn.ch>
Subject: [PATCH net-next 5/8] net: dsa: mv88e6xxx: Workaround missing PHY ID on mv88e6390
Date: Sat, 21 Jan 2017 00:30:59 +0100	[thread overview]
Message-ID: <1484955062-26718-6-git-send-email-andrew@lunn.ch> (raw)
In-Reply-To: <1484955062-26718-1-git-send-email-andrew@lunn.ch>

The internal PHYs of the mv88e6390 do not have a model ID. Trap any
calls to the ID register, and if it is zero, return the ID for the
mv88e6390. The Marvell PHY driver can then bind to this ID.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 drivers/net/dsa/mv88e6xxx/global2.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dsa/mv88e6xxx/global2.c b/drivers/net/dsa/mv88e6xxx/global2.c
index 5c9ccb6775ae..e2b00d1b0c28 100644
--- a/drivers/net/dsa/mv88e6xxx/global2.c
+++ b/drivers/net/dsa/mv88e6xxx/global2.c
@@ -518,7 +518,21 @@ int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, int addr, int reg,
 	if (err)
 		return err;
 
-	return mv88e6xxx_g2_read(chip, GLOBAL2_SMI_PHY_DATA, val);
+	err = mv88e6xxx_g2_read(chip, GLOBAL2_SMI_PHY_DATA, val);
+	if (err)
+		return err;
+
+	if (reg == MII_PHYSID2) {
+		/* The mv88e6390 internal PHYS don't have a model number.
+		 * Use the switch family model number instead.
+		 */
+		if (!(*val & 0x1ff)) {
+			if (chip->info->family == MV88E6XXX_FAMILY_6390)
+				*val |= PORT_SWITCH_ID_PROD_NUM_6390;
+		}
+	}
+
+	return 0;
 }
 
 int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, int addr, int reg,
-- 
2.11.0

  parent reply	other threads:[~2017-01-20 23:33 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-20 23:30 [net-next 0/8] More MV88E6390 patches Andrew Lunn
2017-01-20 23:30 ` [PATCH net-next 1/8] net: dsa: mv88e6xxx: Implement external MDIO bus on mv88e6390 Andrew Lunn
2017-01-21  0:01   ` Florian Fainelli
2017-01-21 16:07     ` Andrew Lunn
2017-01-21  0:04   ` Vivien Didelot
2017-01-21 16:15     ` Andrew Lunn
2017-01-20 23:30 ` [PATCH net-next 2/8] net: phy: Add 2000base-x, 2500base-x and rxaui modes Andrew Lunn
2017-01-21  0:07   ` Florian Fainelli
2017-01-20 23:30 ` [PATCH net-next 3/8] net: dsa: mv88e6xxx: Fix ATU age timer for MV88E6390 Andrew Lunn
2017-01-21  0:10   ` Vivien Didelot
2017-01-20 23:30 ` [PATCH net-next 4/8] net: dsa: mv88e6xxx: Set the CMODE for mv88e6390 ports 9 & 10 Andrew Lunn
2017-01-21  0:20   ` Vivien Didelot
2017-01-20 23:30 ` Andrew Lunn [this message]
2017-01-21  0:03   ` [PATCH net-next 5/8] net: dsa: mv88e6xxx: Workaround missing PHY ID on mv88e6390 Florian Fainelli
2017-01-21  0:26   ` Vivien Didelot
2017-01-24 21:00     ` Gregory CLEMENT
2017-01-20 23:31 ` [PATCH net-next 6/8] net: phy: Marvell: Add mv88e6390 internal PHY Andrew Lunn
2017-01-21  0:04   ` Florian Fainelli
2017-01-20 23:31 ` [PATCH net-next 7/8] net: dsa: mv88e6xxx: Implement Clause 45 access to SMI devices Andrew Lunn
2017-01-20 23:31 ` [PATCH net-next 8/8] net: dsa: mv88e6xxx: Fix typ0 when configuring 2.5Gbps Andrew Lunn
2017-01-21  0:53   ` Vivien Didelot
2017-01-23 18:06 ` [net-next 0/8] More MV88E6390 patches David Miller

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