From: Andrew Lunn <andrew@lunn.ch>
To: David Miller <davem@davemloft.net>
Cc: netdev <netdev@vger.kernel.org>,
Vivien Didelot <vivien.didelot@savoirfairelinux.com>,
Andrew Lunn <andrew@lunn.ch>
Subject: [PATCH net-next 8/8] net: dsa: mv88e6xxx: Fix typ0 when configuring 2.5Gbps
Date: Sat, 21 Jan 2017 00:31:02 +0100 [thread overview]
Message-ID: <1484955062-26718-9-git-send-email-andrew@lunn.ch> (raw)
In-Reply-To: <1484955062-26718-1-git-send-email-andrew@lunn.ch>
In order to enable 2.5Gbps mode, we need the base speed of 10G, plus
the Alt bit setting. Fix a typ0 that used 1Gb base speed.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/dsa/mv88e6xxx/port.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c
index e253ecb6624b..d543a6817d61 100644
--- a/drivers/net/dsa/mv88e6xxx/port.c
+++ b/drivers/net/dsa/mv88e6xxx/port.c
@@ -194,7 +194,7 @@ static int mv88e6xxx_port_set_speed(struct mv88e6xxx_chip *chip, int port,
ctrl = PORT_PCS_CTRL_SPEED_1000;
break;
case 2500:
- ctrl = PORT_PCS_CTRL_SPEED_1000 | PORT_PCS_CTRL_ALTSPEED;
+ ctrl = PORT_PCS_CTRL_SPEED_10000 | PORT_PCS_CTRL_ALTSPEED;
break;
case 10000:
/* all bits set, fall through... */
--
2.11.0
next prev parent reply other threads:[~2017-01-20 23:34 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-20 23:30 [net-next 0/8] More MV88E6390 patches Andrew Lunn
2017-01-20 23:30 ` [PATCH net-next 1/8] net: dsa: mv88e6xxx: Implement external MDIO bus on mv88e6390 Andrew Lunn
2017-01-21 0:01 ` Florian Fainelli
2017-01-21 16:07 ` Andrew Lunn
2017-01-21 0:04 ` Vivien Didelot
2017-01-21 16:15 ` Andrew Lunn
2017-01-20 23:30 ` [PATCH net-next 2/8] net: phy: Add 2000base-x, 2500base-x and rxaui modes Andrew Lunn
2017-01-21 0:07 ` Florian Fainelli
2017-01-20 23:30 ` [PATCH net-next 3/8] net: dsa: mv88e6xxx: Fix ATU age timer for MV88E6390 Andrew Lunn
2017-01-21 0:10 ` Vivien Didelot
2017-01-20 23:30 ` [PATCH net-next 4/8] net: dsa: mv88e6xxx: Set the CMODE for mv88e6390 ports 9 & 10 Andrew Lunn
2017-01-21 0:20 ` Vivien Didelot
2017-01-20 23:30 ` [PATCH net-next 5/8] net: dsa: mv88e6xxx: Workaround missing PHY ID on mv88e6390 Andrew Lunn
2017-01-21 0:03 ` Florian Fainelli
2017-01-21 0:26 ` Vivien Didelot
2017-01-24 21:00 ` Gregory CLEMENT
2017-01-20 23:31 ` [PATCH net-next 6/8] net: phy: Marvell: Add mv88e6390 internal PHY Andrew Lunn
2017-01-21 0:04 ` Florian Fainelli
2017-01-20 23:31 ` [PATCH net-next 7/8] net: dsa: mv88e6xxx: Implement Clause 45 access to SMI devices Andrew Lunn
2017-01-20 23:31 ` Andrew Lunn [this message]
2017-01-21 0:53 ` [PATCH net-next 8/8] net: dsa: mv88e6xxx: Fix typ0 when configuring 2.5Gbps Vivien Didelot
2017-01-23 18:06 ` [net-next 0/8] More MV88E6390 patches David Miller
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