* [PATCH net-next] cxgb4: fix incorrect cim_la output for T6
@ 2017-05-31 13:40 Ganesh Goudar
2017-06-02 18:07 ` David Miller
0 siblings, 1 reply; 5+ messages in thread
From: Ganesh Goudar @ 2017-05-31 13:40 UTC (permalink / raw)
To: netdev, davem; +Cc: nirranjan, indranil, Ganesh Goudar
take care of UpDbgLaRdPtr[0-3] restriction for T6.
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
---
v2:
- not using loop to increment UPDBGLARDPTR
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 9160c88..822c560 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -8312,7 +8312,16 @@ int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr)
ret = t4_cim_read(adap, UP_UP_DBG_LA_DATA_A, 1, &la_buf[i]);
if (ret)
break;
- idx = (idx + 1) & UPDBGLARDPTR_M;
+
+ /* Bits 0-3 of UpDbgLaRdPtr can be between 0000 to 1001 to
+ * identify the 32-bit portion of the full 312-bit data
+ */
+ if (is_t6(adap->params.chip) && (idx & 0xf) >= 9)
+ idx = (idx & 0xff0) + 0x10;
+ else
+ idx++;
+ /* address can't exceed 0xfff */
+ idx &= UPDBGLARDPTR_M;
}
restart:
if (cfg & UPDBGLAEN_F) {
--
2.1.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH net-next] cxgb4: fix incorrect cim_la output for T6
@ 2017-05-19 10:12 Ganesh Goudar
2017-05-19 14:17 ` David Laight
0 siblings, 1 reply; 5+ messages in thread
From: Ganesh Goudar @ 2017-05-19 10:12 UTC (permalink / raw)
To: netdev, davem; +Cc: nirranjan, indranil, Ganesh Goudar
take care of UpDbgLaRdPtr[0-3] restriction for T6
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index aded42b96..917b46b 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -8268,6 +8268,13 @@ int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr)
if (ret)
break;
idx = (idx + 1) & UPDBGLARDPTR_M;
+
+ /* Bits 0-3 of UpDbgLaRdPtr can be between 0000 to 1001 to
+ * identify the 32-bit portion of the full 312-bit data
+ */
+ if (is_t6(adap->params.chip))
+ while ((idx & 0xf) > 9)
+ idx = (idx + 1) % UPDBGLARDPTR_M;
}
restart:
if (cfg & UPDBGLAEN_F) {
--
2.1.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* RE: [PATCH net-next] cxgb4: fix incorrect cim_la output for T6
2017-05-19 10:12 Ganesh Goudar
@ 2017-05-19 14:17 ` David Laight
2017-05-30 11:53 ` Ganesh Goudar
0 siblings, 1 reply; 5+ messages in thread
From: David Laight @ 2017-05-19 14:17 UTC (permalink / raw)
To: 'Ganesh Goudar', netdev@vger.kernel.org,
davem@davemloft.net
Cc: nirranjan@chelsio.com, indranil@chelsio.com
From: Ganesh Goudar
> Sent: 19 May 2017 11:12
T6
>
> take care of UpDbgLaRdPtr[0-3] restriction for T6
>
> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
> ---
> drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
> index aded42b96..917b46b 100644
> --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
> +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
> @@ -8268,6 +8268,13 @@ int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr)
> if (ret)
> break;
> idx = (idx + 1) & UPDBGLARDPTR_M;
> +
> + /* Bits 0-3 of UpDbgLaRdPtr can be between 0000 to 1001 to
> + * identify the 32-bit portion of the full 312-bit data
> + */
> + if (is_t6(adap->params.chip))
> + while ((idx & 0xf) > 9)
> + idx = (idx + 1) % UPDBGLARDPTR_M;
Why the loop, maybe:
if (is_t6(adap->params.chip) && (idx & 0xf) >= 9)
idx = (idx & 0xf0) + 0x10;
else
idx++;
idx &= UPDBGLARDPTR_M;
David
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH net-next] cxgb4: fix incorrect cim_la output for T6
2017-05-19 14:17 ` David Laight
@ 2017-05-30 11:53 ` Ganesh Goudar
0 siblings, 0 replies; 5+ messages in thread
From: Ganesh Goudar @ 2017-05-30 11:53 UTC (permalink / raw)
To: David Laight
Cc: netdev@vger.kernel.org, davem@davemloft.net,
nirranjan@chelsio.com, indranil@chelsio.com
On Friday, May 05/19/17, 2017 at 14:17:11 +0000, David Laight wrote:
> From: Ganesh Goudar
> > Sent: 19 May 2017 11:12
> T6
> >
> > take care of UpDbgLaRdPtr[0-3] restriction for T6
> >
> > Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
> > ---
> > drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
> > index aded42b96..917b46b 100644
> > --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
> > +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
> > @@ -8268,6 +8268,13 @@ int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr)
> > if (ret)
> > break;
> > idx = (idx + 1) & UPDBGLARDPTR_M;
> > +
> > + /* Bits 0-3 of UpDbgLaRdPtr can be between 0000 to 1001 to
> > + * identify the 32-bit portion of the full 312-bit data
> > + */
> > + if (is_t6(adap->params.chip))
> > + while ((idx & 0xf) > 9)
> > + idx = (idx + 1) % UPDBGLARDPTR_M;
>
> Why the loop, maybe:
> if (is_t6(adap->params.chip) && (idx & 0xf) >= 9)
> idx = (idx & 0xf0) + 0x10;
> else
> idx++;
> idx &= UPDBGLARDPTR_M;
>
> David
>
Yes, it is sensible I will send a v2, thanks David.
Thanks
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-06-02 18:07 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-05-31 13:40 [PATCH net-next] cxgb4: fix incorrect cim_la output for T6 Ganesh Goudar
2017-06-02 18:07 ` David Miller
-- strict thread matches above, loose matches on Subject: below --
2017-05-19 10:12 Ganesh Goudar
2017-05-19 14:17 ` David Laight
2017-05-30 11:53 ` Ganesh Goudar
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).