From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerome Brunet Subject: Re: [RFT net-next 2/2] net: stmmac: dwmac-meson8b: don't try to change m250_div parent's rate Date: Sat, 23 Dec 2017 18:43:24 +0100 Message-ID: <1514051004.29566.55.camel@baylibre.com> References: <20171223170433.8150-1-martin.blumenstingl@googlemail.com> <20171223170433.8150-3-martin.blumenstingl@googlemail.com> <1514050857.29566.53.camel@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: linus.luessing@c0d3.blue, khilman@baylibre.com, linux-amlogic@lists.infradead.org, narmstrong@baylibre.com, peppe.cavallaro@st.com, alexandre.torgue@st.com To: Martin Blumenstingl , netdev@vger.kernel.org, ingrassia@epigenesys.com Return-path: Received: from mail-wm0-f65.google.com ([74.125.82.65]:42764 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754345AbdLWRn1 (ORCPT ); Sat, 23 Dec 2017 12:43:27 -0500 Received: by mail-wm0-f65.google.com with SMTP id b199so26892915wme.1 for ; Sat, 23 Dec 2017 09:43:27 -0800 (PST) In-Reply-To: <1514050857.29566.53.camel@baylibre.com> Sender: netdev-owner@vger.kernel.org List-ID: On Sat, 2017-12-23 at 18:40 +0100, Jerome Brunet wrote: > > Trying to set the rate of m250_div's parent clock makes no sense since > > it's a mux which has neither CLK_MUX_ROUND_CLOSEST nor > > CLK_SET_RATE_PARENT set. > > It even does harm on Meson8b SoCs where the input clock for the mux > > cannot be divided down to 250MHz evenly (the parent rate is 500002394Hz) > > So your problem is more with the mux actually, not the divider. Instead of > removing CLK_SET_RATE_PARENT from the divider, may I suggest to put > > CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT on the parent mux, and keep Thinking about it, you don't even need CLK_SET_RATE_NO_REPARENT. Just let rate propagation figure out the best combination > CLK_SET_RATE_PARENT (with CLK_DIVIDER_ROUND_CLOSEST) on the divS. > > I suppose it would a accomplish the same thing with one added benefits for > meson8b : > > If the bootloader did not set the mpll2 to the correct rate, it will now be done > thanks to rate propagation. > > If I missed anything, feel free to point it out. > > Cheers