From: Andrew Lunn <andrew@lunn.ch>
To: David Miller <davem@davemloft.net>
Cc: netdev <netdev@vger.kernel.org>,
Russell King <rmk+kernel@arm.linux.org.uk>,
Florian Fainelli <f.fainelli@gmail.com>,
nikita.yoush@cogentembedded.com, Chris Healy <cphealy@gmail.com>,
marek.behun@nic.cz, Andrew Lunn <andrew@lunn.ch>
Subject: [PATCH net-next 07/13] net: dsa: mv88e6xxx: Add serdes register read/write helper
Date: Thu, 9 Aug 2018 15:38:43 +0200 [thread overview]
Message-ID: <1533821929-20071-8-git-send-email-andrew@lunn.ch> (raw)
In-Reply-To: <1533821929-20071-1-git-send-email-andrew@lunn.ch>
Add a helper for accessing SERDES registers of the 6390 family.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/dsa/mv88e6xxx/serdes.c | 35 +++++++++++++++++++++---------
drivers/net/dsa/mv88e6xxx/serdes.h | 1 -
2 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c b/drivers/net/dsa/mv88e6xxx/serdes.c
index 496d422170ef..36050e429924 100644
--- a/drivers/net/dsa/mv88e6xxx/serdes.c
+++ b/drivers/net/dsa/mv88e6xxx/serdes.c
@@ -35,6 +35,22 @@ static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,
reg, val);
}
+static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip,
+ int lane, int device, int reg, u16 *val)
+{
+ int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
+
+ return mv88e6xxx_phy_read(chip, lane, reg_c45, val);
+}
+
+static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,
+ int lane, int device, int reg, u16 val)
+{
+ int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
+
+ return mv88e6xxx_phy_write(chip, lane, reg_c45, val);
+}
+
static int mv88e6352_serdes_power_set(struct mv88e6xxx_chip *chip, bool on)
{
u16 val, new_val;
@@ -298,12 +314,11 @@ static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane,
bool on)
{
u16 val, new_val;
- int reg_c45;
int err;
- reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
- MV88E6390_PCS_CONTROL_1;
- err = mv88e6xxx_phy_read(chip, lane, reg_c45, &val);
+ err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
+ MV88E6390_PCS_CONTROL_1, &val);
+
if (err)
return err;
@@ -315,7 +330,8 @@ static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane,
new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN;
if (val != new_val)
- err = mv88e6xxx_phy_write(chip, lane, reg_c45, new_val);
+ err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
+ MV88E6390_PCS_CONTROL_1, new_val);
return err;
}
@@ -325,12 +341,10 @@ static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane,
bool on)
{
u16 val, new_val;
- int reg_c45;
int err;
- reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
- MV88E6390_SGMII_CONTROL;
- err = mv88e6xxx_phy_read(chip, lane, reg_c45, &val);
+ err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
+ MV88E6390_SGMII_CONTROL, &val);
if (err)
return err;
@@ -342,7 +356,8 @@ static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane,
new_val = val | MV88E6390_SGMII_CONTROL_PDOWN;
if (val != new_val)
- err = mv88e6xxx_phy_write(chip, lane, reg_c45, new_val);
+ err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
+ MV88E6390_SGMII_CONTROL, new_val);
return err;
}
diff --git a/drivers/net/dsa/mv88e6xxx/serdes.h b/drivers/net/dsa/mv88e6xxx/serdes.h
index 05c4825c36e4..a64ca1974988 100644
--- a/drivers/net/dsa/mv88e6xxx/serdes.h
+++ b/drivers/net/dsa/mv88e6xxx/serdes.h
@@ -29,7 +29,6 @@
#define MV88E6390_PORT10_LANE1 0x15
#define MV88E6390_PORT10_LANE2 0x16
#define MV88E6390_PORT10_LANE3 0x17
-#define MV88E6390_SERDES_DEVICE (4 << 16)
/* 10GBASE-R and 10GBASE-X4/X2 */
#define MV88E6390_PCS_CONTROL_1 0x1000
--
2.18.0
next prev parent reply other threads:[~2018-08-09 16:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-09 13:38 [PATCH net-next 00/13] More complete PHYLINK support for mv88e6xxx Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 01/13] net: dsa: mv88e6xxx: Add support to enabling pause Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 02/13] phylink: add helper for configuring 2500BaseX modes Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 03/13] net: dsa: mv88e6xxx: add phylink support Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 04/13] net: dsa: mv88e6xxx: Refactor SERDES lane code Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 05/13] net: dsa: mv88e6xxx: 6390 vs 6390X SERDES support Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 06/13] net: dsa: mv88e6xxx: Rename sgmii/10g power functions Andrew Lunn
2018-08-09 13:38 ` Andrew Lunn [this message]
2018-08-09 13:38 ` [PATCH net-next 08/13] net: dsa: mv88e6xxx: 2500Base-X uses the 1000Base-X SERDES Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 09/13] net: dsa: mv88e6xxx: Cache the port cmode Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 10/13] net: dsa: mv88e6xxx: Power on/off SERDES on cmode change Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 11/13] net: dsa: mv88e6xxx: link mv88e6xxx_port to mv88e6xxx_chip Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 12/13] net: dsa: mv88e6xxx: Add SERDES phydev_mac_change up for 6390 Andrew Lunn
2018-08-09 13:38 ` [PATCH net-next 13/13] net: dsa: mv88e6xxx: Re-setup interrupts on CMODE change Andrew Lunn
2018-08-09 18:08 ` [PATCH net-next 00/13] More complete PHYLINK support for mv88e6xxx David Miller
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1533821929-20071-8-git-send-email-andrew@lunn.ch \
--to=andrew@lunn.ch \
--cc=cphealy@gmail.com \
--cc=davem@davemloft.net \
--cc=f.fainelli@gmail.com \
--cc=marek.behun@nic.cz \
--cc=netdev@vger.kernel.org \
--cc=nikita.yoush@cogentembedded.com \
--cc=rmk+kernel@arm.linux.org.uk \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).