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From: sunil.kovvuri@gmail.com
To: netdev@vger.kernel.org, davem@davemloft.net
Cc: arnd@arndb.de, linux-soc@vger.kernel.org,
	Sunil Goutham <sgoutham@marvell.com>
Subject: [PATCH v3 13/21] octeontx2-af: Verify NPA/SSO/NIX PF_FUNC mapping
Date: Mon, 19 Nov 2018 16:17:35 +0530	[thread overview]
Message-ID: <1542624463-5868-14-git-send-email-sunil.kovvuri@gmail.com> (raw)
In-Reply-To: <1542624463-5868-1-git-send-email-sunil.kovvuri@gmail.com>

From: Sunil Goutham <sgoutham@marvell.com>

While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.

Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
---
 drivers/net/ethernet/marvell/octeontx2/af/mbox.h   |  2 ++
 drivers/net/ethernet/marvell/octeontx2/af/rvu.c    | 38 ++++++++++++++++++++++
 drivers/net/ethernet/marvell/octeontx2/af/rvu.h    |  1 +
 .../net/ethernet/marvell/octeontx2/af/rvu_nix.c    | 32 +++++++++++-------
 4 files changed, 62 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 3c38e32e..de31857 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -405,6 +405,8 @@ enum nix_af_status {
 	NIX_AF_INVAL_TXSCHQ_CFG     = -412,
 	NIX_AF_SMQ_FLUSH_FAILED     = -413,
 	NIX_AF_ERR_LF_RESET         = -414,
+	NIX_AF_INVAL_NPA_PF_FUNC    = -419,
+	NIX_AF_INVAL_SSO_PF_FUNC    = -420,
 };
 
 /* For NIX LF context alloc and init */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index e59dfd3..517922f 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -337,6 +337,28 @@ struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc)
 		return &rvu->pf[rvu_get_pf(pcifunc)];
 }
 
+static bool is_pf_func_valid(struct rvu *rvu, u16 pcifunc)
+{
+	int pf, vf, nvfs;
+	u64 cfg;
+
+	pf = rvu_get_pf(pcifunc);
+	if (pf >= rvu->hw->total_pfs)
+		return false;
+
+	if (!(pcifunc & RVU_PFVF_FUNC_MASK))
+		return true;
+
+	/* Check if VF is within number of VFs attached to this PF */
+	vf = (pcifunc & RVU_PFVF_FUNC_MASK) - 1;
+	cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
+	nvfs = (cfg >> 12) & 0xFF;
+	if (vf >= nvfs)
+		return false;
+
+	return true;
+}
+
 bool is_block_implemented(struct rvu_hwinfo *hw, int blkaddr)
 {
 	struct rvu_block *block;
@@ -860,6 +882,22 @@ static u16 rvu_get_rsrc_mapcount(struct rvu_pfvf *pfvf, int blktype)
 	return 0;
 }
 
+bool is_pffunc_map_valid(struct rvu *rvu, u16 pcifunc, int blktype)
+{
+	struct rvu_pfvf *pfvf;
+
+	if (!is_pf_func_valid(rvu, pcifunc))
+		return false;
+
+	pfvf = rvu_get_pfvf(rvu, pcifunc);
+
+	/* Check if this PFFUNC has a LF of type blktype attached */
+	if (!rvu_get_rsrc_mapcount(pfvf, blktype))
+		return false;
+
+	return true;
+}
+
 static int rvu_lookup_rsrc(struct rvu *rvu, struct rvu_block *block,
 			   int pcifunc, int slot)
 {
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 9727164..7c96942 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -255,6 +255,7 @@ int rvu_get_pf(u16 pcifunc);
 struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc);
 void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf);
 bool is_block_implemented(struct rvu_hwinfo *hw, int blkaddr);
+bool is_pffunc_map_valid(struct rvu *rvu, u16 pcifunc, int blktype);
 int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot);
 int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf);
 int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index a8d9fdf..55fd2fd 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -694,6 +694,24 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
 	if (nixlf < 0)
 		return NIX_AF_ERR_AF_LF_INVALID;
 
+	/* Check if requested 'NIXLF <=> NPALF' mapping is valid */
+	if (req->npa_func) {
+		/* If default, use 'this' NIXLF's PFFUNC */
+		if (req->npa_func == RVU_DEFAULT_PF_FUNC)
+			req->npa_func = pcifunc;
+		if (!is_pffunc_map_valid(rvu, req->npa_func, BLKTYPE_NPA))
+			return NIX_AF_INVAL_NPA_PF_FUNC;
+	}
+
+	/* Check if requested 'NIXLF <=> SSOLF' mapping is valid */
+	if (req->sso_func) {
+		/* If default, use 'this' NIXLF's PFFUNC */
+		if (req->sso_func == RVU_DEFAULT_PF_FUNC)
+			req->sso_func = pcifunc;
+		if (!is_pffunc_map_valid(rvu, req->sso_func, BLKTYPE_SSO))
+			return NIX_AF_INVAL_SSO_PF_FUNC;
+	}
+
 	/* If RSS is being enabled, check if requested config is valid.
 	 * RSS table size should be power of two, otherwise
 	 * RSS_GRP::OFFSET + adder might go beyond that group or
@@ -798,18 +816,10 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
 	/* Enable LMTST for this NIX LF */
 	rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG2(nixlf), BIT_ULL(0));
 
-	/* Set CQE/WQE size, NPA_PF_FUNC for SQBs and also SSO_PF_FUNC
-	 * If requester has sent a 'RVU_DEFAULT_PF_FUNC' use this NIX LF's
-	 * PCIFUNC itself.
-	 */
-	if (req->npa_func == RVU_DEFAULT_PF_FUNC)
-		cfg = pcifunc;
-	else
+	/* Set CQE/WQE size, NPA_PF_FUNC for SQBs and also SSO_PF_FUNC */
+	if (req->npa_func)
 		cfg = req->npa_func;
-
-	if (req->sso_func == RVU_DEFAULT_PF_FUNC)
-		cfg |= (u64)pcifunc << 16;
-	else
+	if (req->sso_func)
 		cfg |= (u64)req->sso_func << 16;
 
 	cfg |= (u64)req->xqe_sz << 33;
-- 
2.7.4

  parent reply	other threads:[~2018-11-19 21:12 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-19 10:47 [PATCH v3 00/21] octeontx2-af: NPC MCAM support and FLR handling sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 01/21] octeontx2-af: Convert mbox handlers APIs to lowercase sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 02/21] octeontx2-af: Support to modify min/max allowed packet lengths sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 03/21] octeontx2-af: Support to get NIX HW constants from AF sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 04/21] octeontx2-af: Relax resource lock into mutex sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 05/21] octeontx2-af: NPC MCAM entry alloc/free support sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 06/21] octeontx2-af: MCAM entry installation support sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 07/21] octeontx2-af: Support for NPC MCAM counters sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 08/21] octeontx2-af: Map or unmap NPC MCAM entry and counter sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 09/21] octeontx2-af: Alloc and config NPC MCAM entry at a time sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 10/21] octeontx2-af: Add MKEX default profile sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 11/21] octeontx2-af: Support to enable/disable default MCAM entries sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 12/21] octeontx2-af: Add support for stripping STAG/CTAG sunil.kovvuri
2018-11-19 10:47 ` sunil.kovvuri [this message]
2018-11-19 10:47 ` [PATCH v3 14/21] octeontx2-af: Add FLR interrupt handler sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 15/21] octeontx2-af: Teardown NPA, NIX LF upon receiving FLR sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 16/21] octeontx2-af: Mbox communication support btw AF and it's VFs sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 17/21] octeontx2-af: Enable sriov on AF to create VFs sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 18/21] octeontx2-af: Configure AF VFs to talk over LBK channels sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 19/21] octeontx2-af: Add FLR handling support for AF's VFs sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 20/21] octeontx2-af: Add interrupt handlers for Master Enable event sunil.kovvuri
2018-11-19 10:47 ` [PATCH v3 21/21] octeontx2-af: Workarounds for HW errata sunil.kovvuri
2018-11-20  1:56 ` [PATCH v3 00/21] octeontx2-af: NPC MCAM support and FLR handling David Miller

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