From: sunil.kovvuri@gmail.com
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, Sunil Goutham <sgoutham@marvell.com>
Subject: [PATCH 03/15] octeontx2-af: Cleanup CGX config permission checks
Date: Sun, 17 Nov 2019 21:44:14 +0530 [thread overview]
Message-ID: <1574007266-17123-4-git-send-email-sunil.kovvuri@gmail.com> (raw)
In-Reply-To: <1574007266-17123-1-git-send-email-sunil.kovvuri@gmail.com>
From: Sunil Goutham <sgoutham@marvell.com>
Most of the CGX register config is restricted to mapped RVU PFs,
this patch cleans up these permission checks spread across
the rvu_cgx.c file by moving the checks to a common fn().
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
---
.../net/ethernet/marvell/octeontx2/af/rvu_cgx.c | 55 ++++++++++------------
1 file changed, 24 insertions(+), 31 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index 0bbb2eb..5790a76 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -350,6 +350,18 @@ int rvu_cgx_exit(struct rvu *rvu)
return 0;
}
+/* Most of the CGX configuration is restricted to the mapped PF only,
+ * VF's of mapped PF and other PFs are not allowed. This fn() checks
+ * whether a PFFUNC is permitted to do the config or not.
+ */
+inline bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)
+{
+ if ((pcifunc & RVU_PFVF_FUNC_MASK) ||
+ !is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc)))
+ return false;
+ return true;
+}
+
void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable)
{
u8 cgx_id, lmac_id;
@@ -373,11 +385,8 @@ int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)
int pf = rvu_get_pf(pcifunc);
u8 cgx_id, lmac_id;
- /* This msg is expected only from PFs that are mapped to CGX LMACs,
- * if received from other PF/VF simply ACK, nothing to do.
- */
- if ((pcifunc & RVU_PFVF_FUNC_MASK) || !is_pf_cgxmapped(rvu, pf))
- return -ENODEV;
+ if (!is_cgx_config_permitted(rvu, pcifunc))
+ return -EPERM;
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
@@ -409,8 +418,7 @@ int rvu_mbox_handler_cgx_stats(struct rvu *rvu, struct msg_req *req,
u8 cgx_idx, lmac;
void *cgxd;
- if ((req->hdr.pcifunc & RVU_PFVF_FUNC_MASK) ||
- !is_pf_cgxmapped(rvu, pf))
+ if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
return -ENODEV;
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);
@@ -477,12 +485,8 @@ int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,
int pf = rvu_get_pf(pcifunc);
u8 cgx_id, lmac_id;
- /* This msg is expected only from PFs that are mapped to CGX LMACs,
- * if received from other PF/VF simply ACK, nothing to do.
- */
- if ((req->hdr.pcifunc & RVU_PFVF_FUNC_MASK) ||
- !is_pf_cgxmapped(rvu, pf))
- return -ENODEV;
+ if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
+ return -EPERM;
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
@@ -493,16 +497,11 @@ int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,
int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,
struct msg_rsp *rsp)
{
- u16 pcifunc = req->hdr.pcifunc;
- int pf = rvu_get_pf(pcifunc);
+ int pf = rvu_get_pf(req->hdr.pcifunc);
u8 cgx_id, lmac_id;
- /* This msg is expected only from PFs that are mapped to CGX LMACs,
- * if received from other PF/VF simply ACK, nothing to do.
- */
- if ((req->hdr.pcifunc & RVU_PFVF_FUNC_MASK) ||
- !is_pf_cgxmapped(rvu, pf))
- return -ENODEV;
+ if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
+ return -EPERM;
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
@@ -515,11 +514,8 @@ static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en)
int pf = rvu_get_pf(pcifunc);
u8 cgx_id, lmac_id;
- /* This msg is expected only from PFs that are mapped to CGX LMACs,
- * if received from other PF/VF simply ACK, nothing to do.
- */
- if ((pcifunc & RVU_PFVF_FUNC_MASK) || !is_pf_cgxmapped(rvu, pf))
- return -ENODEV;
+ if (!is_cgx_config_permitted(rvu, pcifunc))
+ return -EPERM;
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
@@ -571,11 +567,8 @@ static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en)
int pf = rvu_get_pf(pcifunc);
u8 cgx_id, lmac_id;
- /* This msg is expected only from PFs that are mapped to CGX LMACs,
- * if received from other PF/VF simply ACK, nothing to do.
- */
- if ((pcifunc & RVU_PFVF_FUNC_MASK) || !is_pf_cgxmapped(rvu, pf))
- return -ENODEV;
+ if (!is_cgx_config_permitted(rvu, pcifunc))
+ return -EPERM;
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
--
2.7.4
next prev parent reply other threads:[~2019-11-17 16:15 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-17 16:14 [PATCH 00/15] octeontx2-af: SSO, TIM HW blocks and other config support sunil.kovvuri
2019-11-17 16:14 ` [PATCH 01/15] octeontx2-af: Interface backpressure configuration support sunil.kovvuri
2019-11-18 21:12 ` Jakub Kicinski
2019-11-19 7:30 ` Sunil Kovvuri
2019-11-17 16:14 ` [PATCH 02/15] octeontx2-af: Add support for importing firmware data sunil.kovvuri
2019-11-18 21:28 ` Jakub Kicinski
2019-11-19 7:31 ` Sunil Kovvuri
2019-11-19 21:38 ` Jakub Kicinski
2019-11-20 17:27 ` Sunil Kovvuri
2019-11-19 0:01 ` kbuild test robot
2019-11-22 19:37 ` kbuild test robot
2019-11-17 16:14 ` sunil.kovvuri [this message]
2019-11-17 18:33 ` [PATCH 03/15] octeontx2-af: Cleanup CGX config permission checks David Miller
2019-11-19 7:33 ` Sunil Kovvuri
2019-11-17 16:14 ` [PATCH 04/15] octeontx2-af: Ingress and egress pause frame configuration sunil.kovvuri
2019-11-18 21:33 ` Jakub Kicinski
2019-11-17 16:14 ` [PATCH 05/15] octeontx2-af: Set discovery ID for RVUM block sunil.kovvuri
2019-11-17 16:14 ` [PATCH 06/15] octeontx2-af: add debug msgs for NPA block errors sunil.kovvuri
2019-11-17 16:14 ` [PATCH 07/15] octeontx2-af: add debug msgs for NIX " sunil.kovvuri
2019-11-17 16:14 ` [PATCH 08/15] octeontx2-af: Add SSO unit support to the AF driver sunil.kovvuri
2019-11-17 16:14 ` [PATCH 09/15] octeontx2-af: Config support for per HWGRP thresholds sunil.kovvuri
2019-11-17 16:14 ` [PATCH 10/15] octeontx2-af: add debug msgs for SSO block errors sunil.kovvuri
2019-11-17 16:14 ` [PATCH 11/15] octeontx2-af: add debugfs support for sso sunil.kovvuri
2019-11-17 16:14 ` [PATCH 12/15] octeontx2-af: Add TIM unit support sunil.kovvuri
2019-11-17 18:36 ` David Miller
2019-11-19 7:32 ` Sunil Kovvuri
2019-11-17 16:14 ` [PATCH 13/15] octeontx2-af: verify ingress channel in MCAM entry sunil.kovvuri
2019-11-17 16:14 ` [PATCH 14/15] octeontx2-af: NPC Tx parsed data key extraction profile sunil.kovvuri
2019-11-17 16:14 ` [PATCH 15/15] octeontx2-af: Support to get CGX link info like current speed, fec etc sunil.kovvuri
2019-11-18 21:49 ` Jakub Kicinski
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