From: <min.li.xe@renesas.com>
To: <richardcochran@gmail.com>
Cc: <netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Min Li <min.li.xe@renesas.com>
Subject: [PATCH net-next 2/4] ptp: clockmatrix: remove 5 second delay before entering write phase mode
Date: Tue, 8 Dec 2020 10:41:55 -0500 [thread overview]
Message-ID: <1607442117-13661-2-git-send-email-min.li.xe@renesas.com> (raw)
In-Reply-To: <1607442117-13661-1-git-send-email-min.li.xe@renesas.com>
From: Min Li <min.li.xe@renesas.com>
Remove write phase mode 5 second setup delay, not needed.
Signed-off-by: Min Li <min.li.xe@renesas.com>
---
drivers/ptp/ptp_clockmatrix.c | 22 ----------------------
drivers/ptp/ptp_clockmatrix.h | 1 -
2 files changed, 23 deletions(-)
diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c
index 0ccda22..7a660bc 100644
--- a/drivers/ptp/ptp_clockmatrix.c
+++ b/drivers/ptp/ptp_clockmatrix.c
@@ -70,16 +70,6 @@ static int contains_full_configuration(const struct firmware *fw)
return (count >= full_count);
}
-static long set_write_phase_ready(struct ptp_clock_info *ptp)
-{
- struct idtcm_channel *channel =
- container_of(ptp, struct idtcm_channel, caps);
-
- channel->write_phase_ready = 1;
-
- return 0;
-}
-
static int char_array_to_timespec(u8 *buf,
u8 count,
struct timespec64 *ts)
@@ -1339,16 +1329,8 @@ static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns)
if (err)
return err;
-
- channel->write_phase_ready = 0;
-
- ptp_schedule_worker(channel->ptp_clock,
- msecs_to_jiffies(WR_PHASE_SETUP_MS));
}
- if (!channel->write_phase_ready)
- delta_ns = 0;
-
offset_ps = (s64)delta_ns * 1000;
/*
@@ -1928,7 +1910,6 @@ static const struct ptp_clock_info idtcm_caps_v487 = {
.gettime64 = &idtcm_gettime,
.settime64 = &idtcm_settime_v487,
.enable = &idtcm_enable,
- .do_aux_work = &set_write_phase_ready,
};
static const struct ptp_clock_info idtcm_caps = {
@@ -1941,7 +1922,6 @@ static const struct ptp_clock_info idtcm_caps = {
.gettime64 = &idtcm_gettime,
.settime64 = &idtcm_settime,
.enable = &idtcm_enable,
- .do_aux_work = &set_write_phase_ready,
};
static int configure_channel_pll(struct idtcm_channel *channel)
@@ -2111,8 +2091,6 @@ static int idtcm_enable_channel(struct idtcm *idtcm, u32 index)
if (!channel->ptp_clock)
return -ENOTSUPP;
- channel->write_phase_ready = 0;
-
dev_info(&idtcm->client->dev, "PLL%d registered as ptp%d\n",
index, channel->ptp_clock->index);
diff --git a/drivers/ptp/ptp_clockmatrix.h b/drivers/ptp/ptp_clockmatrix.h
index 713e41a..dd3436e 100644
--- a/drivers/ptp/ptp_clockmatrix.h
+++ b/drivers/ptp/ptp_clockmatrix.h
@@ -125,7 +125,6 @@ struct idtcm_channel {
enum pll_mode pll_mode;
u8 pll;
u16 output_mask;
- int write_phase_ready;
};
struct idtcm {
--
2.7.4
next prev parent reply other threads:[~2020-12-08 16:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 15:41 [PATCH net-next 1/4] ptp: clockmatrix: reset device and check BOOT_STATUS min.li.xe
2020-12-08 15:41 ` min.li.xe [this message]
2020-12-08 15:41 ` [PATCH net-next 3/4] ptp: clockmatrix: Fix non-zero phase_adj is lost after snap min.li.xe
2020-12-08 15:41 ` [PATCH net-next 4/4] ptp: clockmatrix: deprecate firmware older than 4.8.7 min.li.xe
2020-12-09 14:07 ` [PATCH net-next 1/4] ptp: clockmatrix: reset device and check BOOT_STATUS Richard Cochran
2020-12-09 23:10 ` patchwork-bot+netdevbpf
-- strict thread matches above, loose matches on Subject: below --
2020-12-03 15:20 min.li.xe
2020-12-03 15:20 ` [PATCH net-next 2/4] ptp: clockmatrix: remove 5 second delay before entering write phase mode min.li.xe
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