Re: Registering IRQ for MT7530 internal PHYs

[Landen Chao <landen.chao@mediatek.com>]

Hi Qingfang,
On Wed, 2021-01-06 at 16:54 +0800, DENG Qingfang wrote:
> Hi Andrew,
> 
> On Wed, Dec 30, 2020 at 11:23 PM Andrew Lunn <andrew@lunn.ch> wrote:
> >
> > On Wed, Dec 30, 2020 at 09:42:09AM +0000, Marc Zyngier wrote:
> > > > +static irqreturn_t
> > > > +mt7530_irq(int irq, void *data)
> > > > +{
> > > > +   struct mt7530_priv *priv = data;
> > > > +   bool handled = false;
> > > > +   int phy;
> > > > +   u32 val;
> > > > +
> > > > +   val = mt7530_read(priv, MT7530_SYS_INT_STS);
> > > > +   mt7530_write(priv, MT7530_SYS_INT_STS, val);
> > >
> > > If that is an ack operation, it should be dealt with as such in
> > > an irqchip callback instead of being open-coded here.
> >
> > Hi Qingfang
> >
> > Does the PHY itself have interrupt control and status registers?
> 
> MT7531's internal PHY has an interrupt status register, but I don't
> know if the same applies to MT7530.
Interrupt status/mask registers of MT7530 internal PHY is the same as
MT7531. The switch interrupt status register MT7530_SYS_INT_STS[14:8]
reflects internal PHY interrupt status. MT7530_SYS_INT_STS[6:0] we used
before does not related to internal PHY "interrupt".

However, base on MT753x hardware behavior, after read-clear interrupt
status of internal phy, we still need to write-clear
MT7530_SYS_INT_STS[14:8] to clear switch interrupt.

Landen
> 
> >
> > My experience with the Marvell Switch and its embedded PHYs is that
> > the PHYs are just the same as the discrete PHYs. There are bits to
> > enable different interrupts, and there are status bits indicating what
> > event caused the interrupt. Clearing the interrupt in the PHY clears
> > the interrupt in the switch interrupt controller. So in the mv88e6xxx
> > interrupt code, you see i do a read of the switch interrupt controller
> > status register, but i don't write to it as you have done.
> >
> >        Andrew