From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: Re: [PATCH/RFC net-next 3/5] ravb: do not write 1 to reserved bits Date: Sat, 21 Apr 2018 23:44:47 +0300 Message-ID: <1908c6d0-f3e6-6436-c41c-7d2a388f91d4@cogentembedded.com> References: <20180417085030.32650-1-horms+renesas@verge.net.au> <20180417085030.32650-4-horms+renesas@verge.net.au> <20180417.101553.1512039208518397234.davem@davemloft.net> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Cc: magnus.damm@gmail.com, netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org, wsa+renesas@sang-engineering.com, kazuya.mizuguchi.ks@renesas.com To: David Miller , horms+renesas@verge.net.au Return-path: Received: from mail-lf0-f41.google.com ([209.85.215.41]:35559 "EHLO mail-lf0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753223AbeDUUov (ORCPT ); Sat, 21 Apr 2018 16:44:51 -0400 Received: by mail-lf0-f41.google.com with SMTP id r125-v6so9619732lfe.2 for ; Sat, 21 Apr 2018 13:44:51 -0700 (PDT) In-Reply-To: <20180417.101553.1512039208518397234.davem@davemloft.net> Content-Language: en-MW Sender: netdev-owner@vger.kernel.org List-ID: Hello! On 04/17/2018 05:15 PM, David Miller wrote: >> From: Kazuya Mizuguchi >> >> This patch corrects writing 1 to reserved bits. >> The write value should be 0. >> >> Signed-off-by: Kazuya Mizuguchi >> Signed-off-by: Simon Horman > > How are we ending up in situations where the driver is trying to write > non-zero values to those fields in the first place? The brain damaged AVB core design is to blame here. You have to write 0 to clear the set bits and, at the same time, you can't write 1 to the reserved bits... :-/ > The places creating those values should be making sure that the > reserved bits are never set. That's basically what this patch is doing. > If you mask out the reserved bits in the register writing locations, > this just hides bugs. There are no *other* locations in some cases... And I don't think that forcing the reserved bits to 1 after a register is read would look better. :-( MBR, Sergei