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Mon, 10 Nov 2025 17:01:19 +0530 (IST) X-Virus-Scanned: amavis at couthit.local Received: from zimbra.couthit.local ([127.0.0.1]) by localhost (zimbra.couthit.local [127.0.0.1]) (amavis, port 10026) with ESMTP id y5mx4F2JezO3; Mon, 10 Nov 2025 17:01:19 +0530 (IST) Received: from zimbra.couthit.local (zimbra.couthit.local [10.10.10.103]) by zimbra.couthit.local (Postfix) with ESMTP id 370341A45041; Mon, 10 Nov 2025 17:01:19 +0530 (IST) Date: Mon, 10 Nov 2025 17:01:19 +0530 (IST) From: Parvathi Pudi To: Andrew Lunn Cc: parvathi , andrew+netdev , davem , edumazet , kuba , pabeni , danishanwar , rogerq , pmohan , basharath , afd , linux-kernel , netdev , linux-arm-kernel , pratheesh , Prajith Jayarajan , Vignesh Raghavendra , praneeth , srk , rogerq , krishna , mohan Message-ID: <1945451921.12277.1762774279163.JavaMail.zimbra@couthit.local> In-Reply-To: <1336430040.1005.1760615639799.JavaMail.zimbra@couthit.local> References: <20251014124018.1596900-1-parvathi@couthit.com> <20251014124018.1596900-2-parvathi@couthit.com> <1336430040.1005.1760615639799.JavaMail.zimbra@couthit.local> Subject: Re: [PATCH net-next v3 1/3] net: ti: icssm-prueth: Adds helper functions to configure and maintain FDB Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Mailer: Zimbra 9.0.0_ZEXTRAS_20240927 (ZimbraWebClient - GC138 (Linux)/9.0.0_ZEXTRAS_20240927) Thread-Topic: icssm-prueth: Adds helper functions to configure and maintain FDB Thread-Index: n9boZ3kHorfViJim7wqUTYIC+ep2RPQ2l15B X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.couthit.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - couthit.com X-Get-Message-Sender-Via: server.couthit.com: authenticated_id: smtp@couthit.com X-Authenticated-Sender: server.couthit.com: smtp@couthit.com X-Source: X-Source-Args: X-Source-Dir: Hi, > Hi, > >>> +void icssm_prueth_sw_fdb_tbl_init(struct prueth *prueth) >>> +{ >>> + struct fdb_tbl *t = prueth->fdb_tbl; >>> + >>> + t->index_a = (struct fdb_index_array_t *)((__force const void *) >>> + prueth->mem[V2_1_FDB_TBL_LOC].va + >>> + V2_1_FDB_TBL_OFFSET); >> >> We have >> >>> +#define V2_1_FDB_TBL_LOC PRUETH_MEM_SHARED_RAM >> >> and existing code like: >> >> void __iomem *sram_base = prueth->mem[PRUETH_MEM_SHARED_RAM].va; >> >> so it seems like >> >> t->index_a = sram_base + V2_1_FDB_TBL_OFFSET; >> >> with no needs for any casts, since sram_base is a void * so can be >> assigned to any pointer type. >> >> And there are lots of cascading defines like: >> >> /* 4 queue descriptors for port 0 (host receive). 32 bytes */ >> #define HOST_QUEUE_DESC_OFFSET (HOST_QUEUE_SIZE_ADDR + 16) >> >> /* table offset for queue size: >> * 3 ports * 4 Queues * 1 byte offset = 12 bytes >> */ >> #define HOST_QUEUE_SIZE_ADDR (HOST_QUEUE_OFFSET_ADDR + 8) >> /* table offset for queue: >> * 4 Queues * 2 byte offset = 8 bytes >> */ >> #define HOST_QUEUE_OFFSET_ADDR (HOST_QUEUE_DESCRIPTOR_OFFSET_ADDR + 8) >> /* table offset for Host queue descriptors: >> * 1 ports * 4 Queues * 2 byte offset = 8 bytes >> */ >> #define HOST_QUEUE_DESCRIPTOR_OFFSET_ADDR (HOST_Q4_RX_CONTEXT_OFFSET + 8) >> >> allowing code like: >> >> sram = sram_base + HOST_QUEUE_SIZE_ADDR; >> sram = sram_base + HOST_Q1_RX_CONTEXT_OFFSET; >> sram = sram_base + HOST_QUEUE_OFFSET_ADDR; >> sram = sram_base + HOST_QUEUE_DESCRIPTOR_OFFSET_ADDR; >> sram = sram_base + HOST_QUEUE_DESC_OFFSET; >> > > Sure, we will check the feasibility and come back. > We have updated the code to use sram_base + offset directly without any casts, added the __iomem attribute to the structure, and modified the usage of its members at all related places accordingly. With these modifications sparse is able to check all such accesses. We will post these changes in the next version for review. Thanks and Regards, Parvathi.