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[2a01:c22:7331:8a00:3d70:3e0f:83b8:3269]) by smtp.googlemail.com with ESMTPSA id g17-20020a5d4891000000b001e74e998bf9sm16392585wrq.33.2022.03.02.03.02.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Mar 2022 03:02:05 -0800 (PST) Message-ID: <1e828df4-7c5d-01af-cc49-3ef9de2cf6de@gmail.com> Date: Wed, 2 Mar 2022 12:01:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US To: Erico Nunes , Jerome Brunet , Martin Blumenstingl Cc: Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Kevin Hilman , Neil Armstrong , linux-amlogic@lists.infradead.org, netdev@vger.kernel.org, "open list:ARM/Rockchip SoC..." , linux-sunxi@lists.linux.dev References: <1jczjzt05k.fsf@starbuckisacylon.baylibre.com> <6b04d864-7642-3f0a-aac0-a3db84e541af@gmail.com> From: Heiner Kallweit Subject: Re: net: stmmac: dwmac-meson8b: interface sometimes does not come up at boot In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On 02.03.2022 11:33, Erico Nunes wrote: > On Sat, Feb 26, 2022 at 2:53 PM Heiner Kallweit wrote: >> Just to rule out that the PHY may be involved: >> - Does the issue occur with internal and/or external PHY? > > My target boards have the internal phy only. It is not possible for me > at the moment to test it with an external phy. > >> - Issue still occurs in PHY polling mode? (disable PHY interrupt in dts) > > Thanks for suggesting this. I did tests with this and it seems to be a > workaround. > With phy interrupt on recent kernels (around v5.17-rc3) I'm able to > reproduce the issue relatively easily over a batch of a hundred jobs. > With my tests with the phy in polling mode, I have not been able to > reproduce so far, even with several hundred jobs. > It's my understanding that in the problem case the "aneg complete" interrupt fires, but no data flows. This might indicate a timing issue. According to the meson PHY driver (I don't have the datasheet) the PHY doesn't have a "link up" interrupt source, just the mentioned "aneg complete". Below I send an experimental patch that delays the link up processing a little and eliminates not needed interrupt sources. Could you please test it with PHY interrupts enabled? By the way, to all: I found that interrupt mode is broken in fixed (aneg disabled) mode, because link-up isn't signaled. Experiments showed that irq source bit 7 can be used to fix this, but this bit isn't documented in the driver. > For completeness I also tested 46f69ded988d (from my initial analysis) > and setting the phy to polling mode there does not make a difference, > issue still reproduces. So it may have been a different bug. Though I > guess at this point we can disregard that and focus on the current > kernel. > > I tried adding a few debugs and delays to the interrupt code path in > drivers/net/phy/meson-gxl.c but nothing gave me useful info so far. > > Do you have more advice on how to proceed from here? > > Thanks > > Erico Heiner diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c index 7e7904fee..0acb3a99a 100644 --- a/drivers/net/phy/meson-gxl.c +++ b/drivers/net/phy/meson-gxl.c @@ -7,6 +7,7 @@ * Author: Neil Armstrong */ #include +#include #include #include #include @@ -209,12 +210,7 @@ static int meson_gxl_config_intr(struct phy_device *phydev) if (ret) return ret; - val = INTSRC_ANEG_PR - | INTSRC_PARALLEL_FAULT - | INTSRC_ANEG_LP_ACK - | INTSRC_LINK_DOWN - | INTSRC_REMOTE_FAULT - | INTSRC_ANEG_COMPLETE; + val = INTSRC_LINK_DOWN | INTSRC_ANEG_COMPLETE; ret = phy_write(phydev, INTSRC_MASK, val); } else { val = 0; @@ -240,6 +236,9 @@ static irqreturn_t meson_gxl_handle_interrupt(struct phy_device *phydev) if (irq_status == 0) return IRQ_NONE; + if (irq_status & INTSRC_ANEG_COMPLETE) + msleep(100); + phy_trigger_machine(phydev); return IRQ_HANDLED; -- 2.35.1