From: Robin Holt <holt@sgi.com>
To: Andi Kleen <ak@suse.de>
Cc: netdev@oss.sgi.com, modica@sgi.com
Subject: Re: Zero copy transmit
Date: Wed, 30 Apr 2003 10:05:33 -0500 [thread overview]
Message-ID: <20030430150533.GA8158@sgi.com> (raw)
In-Reply-To: <20030429203945.GD349@Wotan.suse.de>
On Tue, Apr 29, 2003 at 10:39:46PM +0200, Andi Kleen wrote:
> > Don't get me wrong, we would certainly drop any notions of this if we
> > found that it was slower and I will be glad to post any results. The
> > goal is to take advantage of the hardware to make things faster.
>
> You have no hardware to make the remote TLB flushes fast ;)
>
> I'm sure you can show it being an advantage with a single threaded process.
> But when you run it on a multithreaded application just with two threads
> it may look very different.
>
Last time I checked, the IA64 processor provides a ptc.g instruction for
exactly this. The only hit we take from using it is Intel limits it to
a single outstanding ptc.g pending machine wide. This is accomplished with
a global spinlock. I would love to convince Intel to change this instruction,
but that probably will not happen any time soon.
I will concede that the ptc.g instruction takes a considerable period of
time on our 64 processor machines, but that comes out to a lot of local
TLB coherence domains that need to be updated.
I believe there is a similar instruction for x86. Could someone verify
this?
next prev parent reply other threads:[~2003-04-30 15:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-04-29 18:44 Zero copy transmit Steve Modica
2003-04-29 19:20 ` Andi Kleen
2003-04-29 19:33 ` Robin Holt
2003-04-29 19:41 ` Andi Kleen
2003-04-29 19:41 ` Steve Modica
2003-04-29 19:59 ` Andi Kleen
2003-04-29 20:09 ` Steve Modica
2003-04-29 20:39 ` Andi Kleen
2003-04-30 1:41 ` Michael Richardson
2003-04-30 15:05 ` Robin Holt [this message]
2003-04-30 15:29 ` Andi Kleen
2003-04-29 20:17 ` Christoph Hellwig
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