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From: Andi Kleen <ak@suse.de>
To: Robin Holt <holt@sgi.com>
Cc: Andi Kleen <ak@suse.de>, netdev@oss.sgi.com, modica@sgi.com
Subject: Re: Zero copy transmit
Date: Wed, 30 Apr 2003 17:29:22 +0200	[thread overview]
Message-ID: <20030430152922.GD18661@oldwotan.suse.de> (raw)
In-Reply-To: <20030430150533.GA8158@sgi.com>

> Last time I checked, the IA64 processor provides a ptc.g instruction for
> exactly this.  The only hit we take from using it is Intel limits it to
> a single outstanding ptc.g pending machine wide.  This is accomplished with
> a global spinlock.  I would love to convince Intel to change this instruction,
> but that probably will not happen any time soon.

IA64 Linux doesn't use it at least. The 2.5 flush_tlb_mm calls smp_flush_tlb_mm
which ends up doing IPIs. Same for flush_tlb_page - calls flush_tlb_range
which calls sn2_global_tlb_purge, which does something complicated
that also looks like an global IPI. It also takes a global spinlock.

> 
> I will concede that the ptc.g instruction takes a considerable period of
> time on our 64 processor machines, but that comes out to a lot of local
> TLB coherence domains that need to be updated.
> 
> I believe there is a similar instruction for x86.  Could someone verify
> this?

Nope. x86 has to IPI for remote TLB flushes.

-Andi
> 

  reply	other threads:[~2003-04-30 15:29 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-04-29 18:44 Zero copy transmit Steve Modica
2003-04-29 19:20 ` Andi Kleen
2003-04-29 19:33   ` Robin Holt
2003-04-29 19:41     ` Andi Kleen
2003-04-29 19:41   ` Steve Modica
2003-04-29 19:59     ` Andi Kleen
2003-04-29 20:09       ` Steve Modica
2003-04-29 20:39         ` Andi Kleen
2003-04-30  1:41           ` Michael Richardson
2003-04-30 15:05           ` Robin Holt
2003-04-30 15:29             ` Andi Kleen [this message]
2003-04-29 20:17     ` Christoph Hellwig

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