From mboxrd@z Thu Jan  1 00:00:00 1970
From: "David S. Miller" <davem@redhat.com>
Subject: Re: Route cache performance under stress
Date: Sun, 08 Jun 2003 23:03:32 -0700 (PDT)
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   From: "CIT/Paul" <xerox@foonet.net>
   Date: Mon, 9 Jun 2003 01:51:45 -0400

   I'd love to test this out.. If it could do full gigabit line rate with
   random ips that would be soooooooo nice :>

It isn't impossible with the current design, that I am
quire sure of.

Here is a simple idea, make the routing cache miss case steal
an entry sitting at the end of the hash chain this new one will
map to.  It only steals entries which have not been recently used.

The big problem area on SMP is fib_validate_source.  I'm sure some
clear thinking can wipe that off the profiles too.