From mboxrd@z Thu Jan 1 00:00:00 1970 From: Francois Romieu Subject: Re: fealnx oopses Date: Sat, 27 Mar 2004 01:30:07 +0100 Sender: netdev-bounce@oss.sgi.com Message-ID: <20040327013007.D26347@electric-eye.fr.zoreil.com> References: <200403261214.58127.vda@port.imtp.ilyichevsk.odessa.ua> <200403270014.23088.vda@port.imtp.ilyichevsk.odessa.ua> <20040326233514.B26347@electric-eye.fr.zoreil.com> <200403270203.18971.vda@port.imtp.ilyichevsk.odessa.ua> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Jeff Garzik , Andreas Henriksson , netdev@oss.sgi.com Return-path: To: Denis Vlasenko Content-Disposition: inline In-Reply-To: <200403270203.18971.vda@port.imtp.ilyichevsk.odessa.ua>; from vda@port.imtp.ilyichevsk.odessa.ua on Sat, Mar 27, 2004 at 02:03:40AM +0200 Errors-to: netdev-bounce@oss.sgi.com List-Id: netdev.vger.kernel.org Denis Vlasenko : [...] > Not exactly. CPU does not atomically increment memory. > I am saying that x86 CPU can't be interrupted in the middle > of read-modify-write operation, like Yep, that's exactly what I tought was not possible. Complete brain outage. -- Ueimor