From: "David S. Miller" <davem@redhat.com>
To: Greg Banks <gnb@sgi.com>
Cc: mchan@broadcom.com, netdev@oss.sgi.com
Subject: Re: [PATCH] fix BUG in tg3_tx
Date: Wed, 26 May 2004 11:01:21 -0700 [thread overview]
Message-ID: <20040526110121.657f2d42.davem@redhat.com> (raw)
In-Reply-To: <20040526160443.GD4557@sgi.com>
On Thu, 27 May 2004 02:04:43 +1000
Greg Banks <gnb@sgi.com> wrote:
> On a related note, is there a good reason why the tg3 driver uses
> the on-chip SRAM send ring by default instead of the host send ring?
> This seems like it would dramatically increase the PIO load on the
> chipset for some of the workloads I'm interested in.
Good question.
It actually results in better performance to use PIOs to the
chip to write the TXD descriptors. You may be skeptical about
this but it cannot be denied that it does result in lower
latency as we don't have to wait for the chip to do it's next
prefetch and _furthermore_ this means that no CPU cache lines
will bounce from cpu-->device in order to get the descriptors
to the chip.
next prev parent reply other threads:[~2004-05-26 18:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-05-25 20:04 [PATCH] fix BUG in tg3_tx Michael Chan
2004-05-26 0:54 ` Greg Banks
2004-05-26 16:04 ` Greg Banks
2004-05-26 18:01 ` David S. Miller [this message]
2004-05-26 23:47 ` Greg Banks
2004-05-26 23:52 ` David S. Miller
2004-05-27 0:12 ` Greg Banks
-- strict thread matches above, loose matches on Subject: below --
2004-05-26 17:43 Michael Chan
2004-05-26 18:47 ` David S. Miller
2004-05-26 23:52 ` Greg Banks
2004-05-26 23:50 ` Greg Banks
2004-05-26 1:22 Michael Chan
2004-05-24 17:33 Michael Chan
2004-05-24 17:26 Michael Chan
2004-05-24 7:26 Greg Banks
2004-05-24 7:40 ` David S. Miller
2004-05-24 8:04 ` Greg Banks
2004-05-24 17:06 ` David S. Miller
2004-05-25 1:04 ` Greg Banks
2004-05-25 17:51 ` David S. Miller
2004-05-26 0:12 ` Greg Banks
2004-05-25 17:52 ` David S. Miller
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