From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lennert Buytenhek Subject: Re: [E1000-devel] Transmission limit Date: Wed, 1 Dec 2004 01:11:07 +0100 Message-ID: <20041201001107.GE4203@xi.wantstofly.org> References: <1101467291.24742.70.camel@mellia.lipar.polito.it> <41A73826.3000109@draigBrady.com> <16807.20052.569125.686158@robur.slu.se> <1101484740.24742.213.camel@mellia.lipar.polito.it> <41A76085.7000105@draigBrady.com> <1101499285.1079.45.camel@jzny.localdomain> <16811.8052.678955.795327@robur.slu.se> <1101821501.1043.43.camel@jzny.localdomain> <20041130134600.GA31515@xi.wantstofly.org> <1101824754.1044.126.camel@jzny.localdomain> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Robert Olsson , P@draigBrady.com, mellia@prezzemolo.polito.it, e1000-devel@lists.sourceforge.net, Jorge Manuel Finochietto , Giulio Galante , netdev@oss.sgi.com Return-path: To: jamal Content-Disposition: inline In-Reply-To: <1101824754.1044.126.camel@jzny.localdomain> Sender: netdev-bounce@oss.sgi.com Errors-to: netdev-bounce@oss.sgi.com List-Id: netdev.vger.kernel.org On Tue, Nov 30, 2004 at 09:25:54AM -0500, jamal wrote: > > > > Also from what I understand new HW and MSI can help in the case where > > > > pass objects between CPU. Did I dream or did someone tell me that S2IO > > > > could have several TX ring that could via MSI be routed to proper cpu? > > > > > > I am wondering if the per CPU tx/rx irqs are valuable at all. They sound > > > like more hell to maintain. > > > > On the TX path you'd have qdiscs to deal with as well, no? > > I think management of it would be non-trivial in SMP. Youd have to start > playing stupid loadbalancing tricks which would reduce the value of > existence of tx irqs to begin with. You mean the management of qdiscs would be non-trivial? Probably the idea of these kinds of tricks is to skip the qdisc step altogether. --L