From mboxrd@z Thu Jan  1 00:00:00 1970
From: "David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH 2.6.11 5/8] tg3: Add unstable PLL workaround for 5750
Date: Wed, 23 Mar 2005 11:09:18 -0800
Message-ID: <20050323110918.460ff255.davem@davemloft.net>
References: <B1508D50A0692F42B217C22C02D84972020F3E25@NT-IRVA-0741.brcm.ad.broadcom.com>
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To: "Michael Chan" <mchan@broadcom.com>
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On Sun, 20 Mar 2005 23:48:13 -0800
"Michael Chan" <mchan@broadcom.com> wrote:

> Add unstable PLL clock workaround for 5750 Ax and Bx devices. The workaround
> code is run just before entering D3hot state.
> 
> Signed-off-by: Michael Chan <mchan@broadcom.com>

Applied, thanks Michael.