From: Christoph Hellwig <hch@infradead.org>
To: Michael Buesch <mb@bu3sch.de>
Cc: Ivo van Doorn <ivdoorn@gmail.com>,
netdev@vger.kernel.org, rt2x00-devel@lfcorreia.dyndns.org
Subject: Re: [PATCH 20/32] rt2x00: byte ordering correctness
Date: Fri, 28 Apr 2006 14:46:33 +0100 [thread overview]
Message-ID: <20060428134632.GA4526@infradead.org> (raw)
In-Reply-To: <200604281542.29534.mb@bu3sch.de>
On Fri, Apr 28, 2006 at 03:42:29PM +0200, Michael Buesch wrote:
> I guess you are confusing something here:
> MMIO access versus values in structs (for example) that
> are accessed through DMA (for example).
so there's two general problems:
mmio/pio - linux expects the device to be le there by defalt and
{read,write}{b,s,l} do the switch automatically
dmaed data - you always need to switch data yourself, data is commonly
either be or le
now there's devices that are always be for mmio or can be switched to it
during initialization. For Linux you'd traditionally have to switch before
calling {read,write}{b,s,l} or use the __raw_ version that have other issues.
The ioread*/iowrite* APIs now have a BE version, too.
I've not heard about devices having this switch for dma payload, and it
would be rather usual as large parts of it are determined by some on the
wire protocol anyway.
>
> --
> Greetings Michael.
---end quoted text---
next prev parent reply other threads:[~2006-04-28 13:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-04-27 22:03 [PATCH 20/32] rt2x00: byte ordering correctness Ivo van Doorn
2006-04-27 22:13 ` Christoph Hellwig
2006-04-28 12:59 ` Ivo van Doorn
2006-04-28 13:14 ` Christoph Hellwig
2006-04-28 13:31 ` Ivo van Doorn
2006-04-28 13:42 ` Michael Buesch
2006-04-28 13:45 ` Ivo van Doorn
2006-04-28 13:46 ` Christoph Hellwig [this message]
2006-04-28 13:56 ` Michael Buesch
2006-04-28 15:01 ` Ivo van Doorn
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