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From: "Kok, Auke" <auke-jan.h.kok@intel.com>
To: "Garzik, Jeff" <jgarzik@pobox.com>
Cc: netdev@vger.kernel.org, "Brandeburg,
	Jesse" <jesse.brandeburg@intel.com>,
	"Kok, Auke" <auke-jan.h.kok@intel.com>,
	"Kok, Auke" <auke@foo-projects.org>,
	"Ronciak, John" <john.ronciak@intel.com>
Subject: [PATCH 14/21] e1000: M88 PHY workaround
Date: Wed, 21 Jun 2006 22:20:37 -0700	[thread overview]
Message-ID: <20060622052036.25497.23966.stgit@gitlost.site> (raw)
In-Reply-To: <20060622051815.25497.89192.stgit@gitlost.site>


M88 rev 2 PHY needs a longer downshift to function properly. This adds
a much longer downshift counter for this specific device.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
---

 drivers/net/e1000/e1000_hw.c |   46 ++++++++++++++++++++++++++----------------
 drivers/net/e1000/e1000_hw.h |   11 ++++++++++
 2 files changed, 40 insertions(+), 17 deletions(-)

diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index 1c5b184..37eb351 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -1565,28 +1565,40 @@ e1000_copper_link_mgp_setup(struct e1000
     phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL;
     if(hw->disable_polarity_correction == 1)
         phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
-        ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
-        if(ret_val)
-            return ret_val;
-
-    /* Force TX_CLK in the Extended PHY Specific Control Register
-     * to 25MHz clock.
-     */
-    ret_val = e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
-    if(ret_val)
+    ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+    if (ret_val)
         return ret_val;
 
-    phy_data |= M88E1000_EPSCR_TX_CLK_25;
-
     if (hw->phy_revision < M88E1011_I_REV_4) {
-        /* Configure Master and Slave downshift values */
-        phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
+        /* Force TX_CLK in the Extended PHY Specific Control Register
+         * to 25MHz clock.
+         */
+        ret_val = e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
+        if (ret_val)
+            return ret_val;
+
+        phy_data |= M88E1000_EPSCR_TX_CLK_25;
+
+        if ((hw->phy_revision == E1000_REVISION_2) &&
+            (hw->phy_id == M88E1111_I_PHY_ID)) {
+            /* Vidalia Phy, set the downshift counter to 5x */
+            phy_data &= ~(M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK);
+            phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X;
+            ret_val = e1000_write_phy_reg(hw,
+                                        M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
+            if (ret_val)
+                return ret_val;
+        } else {
+            /* Configure Master and Slave downshift values */
+            phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
                               M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
-        phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
+            phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
                              M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
-        ret_val = e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
-        if(ret_val)
-            return ret_val;
+            ret_val = e1000_write_phy_reg(hw,
+                                        M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
+            if (ret_val)
+               return ret_val;
+        }
     }
 
     /* SW Reset the PHY so all changes take effect */
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 376a2ef..bfbc7d8 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -2765,6 +2765,17 @@ struct e1000_host_command_info {
 #define M88E1000_EPSCR_TX_CLK_25      0x0070 /* 25  MHz TX_CLK */
 #define M88E1000_EPSCR_TX_CLK_0       0x0000 /* NO  TX_CLK */
 
+/* M88EC018 Rev 2 specific DownShift settings */
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK  0x0E00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X    0x0000
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X    0x0200
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X    0x0400
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X    0x0600
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X    0x0800
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X    0x0A00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X    0x0C00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X    0x0E00
+
 /* IGP01E1000 Specific Port Config Register - R/W */
 #define IGP01E1000_PSCFR_AUTO_MDIX_PAR_DETECT  0x0010
 #define IGP01E1000_PSCFR_PRE_EN                0x0020



--
Auke Kok <auke-jan.h.kok@intel.com>

  parent reply	other threads:[~2006-06-22  5:14 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-06-22  5:18 [PATCH 00/21] e1000: driver update to 7.1.9-k2 Kok, Auke
2006-06-22  5:20 ` [PATCH 01/21] e1000: fix loopback ethtool test Kok, Auke
2006-06-22  5:20 ` [PATCH 02/21] e1000: rework driver hardware reset locking Kok, Auke
2006-06-27  1:42   ` Jeff Garzik
2006-06-27 14:42     ` Auke Kok
2006-06-22  5:20 ` [PATCH 03/21] e1000: Make PHY powerup/down a function Kok, Auke
2006-06-22  5:20 ` [PATCH 04/21] e1000: fix CONFIG_PM blocks Kok, Auke
2006-06-22  5:20 ` [PATCH 05/21] e1000: small performance tweak by removing double code Kok, Auke
2006-06-22  5:20 ` [PATCH 06/21] e1000: add smart power down code Kok, Auke
2006-06-27  1:43   ` Jeff Garzik
2006-06-27  8:49     ` Florian Reitmeir
2006-06-27 14:40     ` Auke Kok
2006-06-22  5:20 ` [PATCH 07/21] e1000: change printk into DPRINTK Kok, Auke
2006-06-22  5:20 ` [PATCH 08/21] e1000: recycle skb Kok, Auke
2006-06-22  5:20 ` [PATCH 09/21] e1000: rework module param code with uninitialized values Kok, Auke
2006-06-22  5:20 ` [PATCH 10/21] e1000: force register write flushes to circumvent broken platforms Kok, Auke
2006-06-27  1:47   ` Jeff Garzik
2006-06-27 14:36     ` Auke Kok
2006-06-27 15:41       ` Jeff Garzik
2006-06-27 15:56       ` Auke Kok
2006-06-22  5:20 ` [PATCH 11/21] e1000: disable CRC stripping workaround Kok, Auke
2006-06-22  5:31   ` Ben Greear
2006-06-22 15:36     ` Auke Kok
2006-06-22 15:39     ` Jesse Brandeburg
2006-06-22 15:55       ` Ben Greear
2006-06-22 16:01         ` Jesse Brandeburg
2006-06-22 15:57       ` Lennert Buytenhek
2006-06-27  1:48   ` Jeff Garzik
2006-06-27 14:29     ` Auke Kok
2006-06-22  5:20 ` [PATCH 12/21] e1000: fix adapter led blinking inconsistency Kok, Auke
2006-06-22  5:20 ` [PATCH 13/21] e1000: add E1000_BIG_ENDIAN symbol Kok, Auke
2006-06-27  1:49   ` Jeff Garzik
2006-06-27 14:25     ` Auke Kok
2006-06-22  5:20 ` Kok, Auke [this message]
2006-06-22  5:20 ` [PATCH 15/21] e1000: check return value of _get_speed_and_duplex Kok, Auke
2006-06-22  5:20 ` [PATCH 16/21] e1000: disable ERT Kok, Auke
2006-06-22  5:20 ` [PATCH 17/21] e1000: add ich8lan core functions Kok, Auke
2006-06-27  1:52   ` Jeff Garzik
2006-06-27 16:12     ` Auke Kok
2006-06-22  5:20 ` [PATCH 18/21] e1000: integrate ich8 support into driver Kok, Auke
2006-06-27  1:54   ` Jeff Garzik
2006-06-22  5:20 ` [PATCH 19/21] e1000: allow user to disable ich8 lock loss workaround Kok, Auke
2006-06-27  1:55   ` Jeff Garzik
2006-06-27 14:21     ` Auke Kok
2006-06-22  5:20 ` [PATCH 20/21] e1000: add ich8lan device ID's Kok, Auke
2006-06-22  5:20 ` [PATCH 21/21] e1000: increase version to 7.1.9-k2 Kok, Auke
2006-06-27 22:48 ` [PATCH 00/21] e1000: driver update " Auke Kok

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